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path: root/drivers/pci/controller/dwc
AgeCommit message (Expand)AuthorLines
2020-10-21Merge branch 'remotes/lorenzo/pci/tegra'Bjorn Helgaas-15/+5
2020-10-21Merge branch 'remotes/lorenzo/pci/qcom'Bjorn Helgaas-0/+13
2020-10-21Merge branch 'remotes/lorenzo/pci/meson'Bjorn Helgaas-2/+9
2020-10-21Merge branch 'remotes/lorenzo/pci/kirin'Bjorn Helgaas-1/+5
2020-10-21Merge branch 'remotes/lorenzo/pci/imx6'Bjorn Helgaas-23/+18
2020-10-20PCI: dwc: Add link up check in dw_child_pcie_ops.map_bus()Hou Zhiqiang-0/+11
2020-10-13PCI: dwc: Fix MSI page leakage in suspend/resumeJisheng Zhang-17/+36
2020-10-13PCI: dwc: Skip PCIE_MSI_INTR0* programming if MSI is disabledJisheng Zhang-1/+1
2020-10-13PCI: keystone: Remove iATU register mappingKunihiko Hayashi-16/+4
2020-10-13PCI: dwc: Add common iATU register supportKunihiko Hayashi-0/+5
2020-10-05PCI: meson: Build as module by defaultKevin Hilman-2/+9
2020-09-28PCI: kirin: Return -EPROBE_DEFER in case the gpio isn't readyBean Huo-1/+5
2020-09-28PCI: dwc: Fix 'cast truncates bits from constant value'Gustavo Pimentel-1/+1
2020-09-21PCI: layerscape: Add EP mode support for ls1088a and ls2088aXiaowei Bao-19/+53
2020-09-21PCI: layerscape: Modify the MSIX to the doorbell modeXiaowei Bao-1/+2
2020-09-21PCI: layerscape: Modify the way of getting capability with different PEXXiaowei Bao-8/+23
2020-09-21PCI: layerscape: Fix some format issue of the codeXiaowei Bao-2/+2
2020-09-21PCI: designware-ep: Modify MSI and MSIX CAP way of findingXiaowei Bao-21/+118
2020-09-21PCI: designware-ep: Move the function of getting MSI capability forwardXiaowei Bao-4/+4
2020-09-21PCI: designware-ep: Add the doorbell mode of MSI-X in EP modeXiaowei Bao-0/+31
2020-09-21PCI: designware-ep: Add multiple PFs support for DWCXiaowei Bao-59/+143
2020-09-10PCI: dwc: Use DBI accessorsRob Herring-10/+8
2020-09-10PCI: dwc: Move N_FTS setup to common setupRob Herring-85/+35
2020-09-10PCI: dwc/intel-gw: Drop unused max_widthRob Herring-4/+0
2020-09-10PCI: dwc/intel-gw: Move getting PCI_CAP_ID_EXP offset to intel_pcie_link_setup()Rob Herring-14/+1
2020-09-10PCI: dwc/intel-gw: Drop unnecessary checking of DT 'device_type' propertyRob Herring-6/+0
2020-09-10PCI: dwc: Set PORT_LINK_DLL_LINK_EN in common setup codeRob Herring-4/+1
2020-09-10PCI: dwc: Centralize link gen settingRob Herring-151/+40
2020-09-08PCI: dwc: Make ATU accessors privateRob Herring-18/+6
2020-09-08PCI: dwc: Remove read_dbi2 codeRob Herring-36/+0
2020-09-08PCI: dwc/tegra: Use common Designware port logic register definitionsRob Herring-34/+28
2020-09-08PCI: dwc: Remove hardcoded PCI_CAP_ID_EXP offsetRob Herring-12/+7
2020-09-08PCI: dwc/qcom: Use common PCI register definitionsRob Herring-10/+8
2020-09-08PCI: dwc/imx6: Use common PCI register definitionsRob Herring-23/+14
2020-09-08PCI: dwc/meson: Rework PCI config and DW port logic register accessesRob Herring-51/+25
2020-09-08PCI: dwc/meson: Drop unnecessary RC config space initializationRob Herring-20/+0
2020-09-08PCI: dwc/meson: Drop the duplicate number of lanes setupRob Herring-28/+1
2020-09-08PCI: dwc: Ensure FAST_LINK_MODE is clearedRob Herring-1/+5
2020-09-08PCI: dwc: Add a 'num_lanes' field to struct dw_pcieRob Herring-8/+7
2020-09-08PCI: dwc/imx6: Remove duplicate define PCIE_LINK_WIDTH_SPEED_CONTROLRob Herring-2/+0
2020-09-08PCI: dwc: Check CONFIG_PCI_MSI inside dw_pcie_msi_init()Rob Herring-34/+11
2020-09-08PCI: dwc/keystone: Drop duplicated 'num-viewport'Rob Herring-10/+1
2020-09-08PCI: dwc: Simplify config space handlingRob Herring-55/+20
2020-09-08PCI: dwc: Remove storing of PCI resourcesRob Herring-29/+19
2020-09-08PCI: dwc: Remove root_bus pointerRob Herring-5/+4
2020-09-08PCI: dwc: Convert to use pci_host_probe()Rob Herring-19/+3
2020-09-08PCI: dwc: keystone: Convert .scan_bus() callback to use add_busRob Herring-3/+9
2020-09-08PCI: dwc: Use generic config accessorsRob Herring-82/+37
2020-09-08PCI: dwc: Remove dwc specific config accessor opsRob Herring-20/+0
2020-09-08PCI: dwc: histb: Use pci_ops for root config space accessorsRob Herring-18/+23
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