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2025-10-01Merge tag 'pinctrl-v6.18-1' of ↵Linus Torvalds1-1/+22
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "We have GPIO awareness in the pin control core and an interesting AAEON driver. Core changes: - Allow pins to be identified/marked as GPIO mode with a special callback. The pin controller core is now "aware" if a pin is in GPIO mode if the callback is implemented in the driver, and can thus be marked as "strict", i.e. disallowing simultaneous use of a line as GPIO and another function such as I2C. This is enabled in the Qualcomm TLMM driver and also implemeted from day 1 in the new Broadcom STB driver - Rename the pin config option PIN_CONFIG_OUTPUT to PIN_CONFIG_LEVEL to better describe what the config is doing, as well as making it more intuitive what shall be returned when reading this property New drivers: - Qualcomm SDM660 LPASS LPI TLMM pin controller subdriver - Qualcomm Glymur family pin controller driver - Broadcom STB family pin controller driver - Tegra186 pin controller driver - AAEON UP pin controller support. This is some special pin controller that works as an external advanced line MUX and amplifier for signals from an Intel SoC. A cooperative effort with the GPIO maintainer was needed to reach a solution where we reuse code from the GPIO aggregator/forwarder driver - Renesas RZ/T2H and RZ/N2H pin controller support - Axis ARTPEC-8 subdriver for the Samsung pin controller driver Improvements: - Output enable (OEN) support in the Renesas RZG2L driver - Properly support bias pull up/down in the pinctrl-single driver - Move over all GPIO portions using generic MMIO GPIO to the new generic GPIO chip management which has a nice and separate API - Proper DT bindings for some older Broadcom SoCs - External GPIO (EGPIO) support in the Qualcomm SM8250 Deleted code: - Dropped the now unused Samsung S3C24xx drivers" * tag 'pinctrl-v6.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (75 commits) pinctrl: use more common syntax for compound literals pinctrl: Simplify printks with pOF format pinctrl: qcom: Add SDM660 LPASS LPI TLMM dt-bindings: pinctrl: qcom: Add SDM660 LPI pinctrl pinctrl: qcom: lpass-lpi: Add ability to use custom pin offsets pinctrl: qcom: Add glymur pinctrl driver dt-bindings: pinctrl: qcom: Add Glymur pinctrl pinctrl: qcom: sm8250: Add egpio support pinctrl: generic: rename PIN_CONFIG_OUTPUT to LEVEL pinctrl: keembay: fix double free in keembay_build_functions() pinctrl: spacemit: fix typo in PRI_TDI pin name pinctrl: eswin: Fix regulator error check and Kconfig dependency pinctrl: bcm: Add STB family pin controller driver dt-bindings: pinctrl: Add support for Broadcom STB pin controller pinctrl: qcom: make the pinmuxing strict pinctrl: qcom: mark the `gpio` and `egpio` pins function as non-strict functions pinctrl: qcom: add infrastructure for marking pin functions as GPIOs pinctrl: allow to mark pin functions as requestable GPIOs pinctrl: qcom: use generic pin function helpers pinctrl: make struct pinfunction a pointer in struct function_desc ...
2025-09-18Merge tag 'ib-mfd-gpio-input-pinctrl-pwm-v6.18' of ↵Bartosz Golaszewski1-0/+11
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd into gpio/for-next Pull changes from the immutable branch between MFD, GPIO, Input, Pinctrl and PWM trees containing the GPIO driver for max7360.
2025-09-16pinctrl: Add MAX7360 pinctrl driverMathieu Dubois-Briand1-0/+11
Add driver for Maxim Integrated MAX7360 pinctrl on the PORT pins. Pins can be used either for GPIO, PWM or rotary encoder functionalities. Signed-off-by: Mathieu Dubois-Briand <mathieu.dubois-briand@bootlin.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20250824-mdb-max7360-support-v14-3-435cfda2b1ea@bootlin.com Signed-off-by: Lee Jones <lee@kernel.org>
2025-09-08pinctrl: eswin: Fix regulator error check and Kconfig dependencyYulin Lu1-0/+2
Smatch reported the following warning in eic7700_pinctrl_probe(): drivers/pinctrl/pinctrl-eic7700.c:638 eic7700_pinctrl_probe() warn: passing zero to 'PTR_ERR' The root cause is that devm_regulator_get() may return NULL when CONFIG_REGULATOR is disabled. In such case, IS_ERR_OR_NULL() triggers PTR_ERR(NULL) which evaluates to 0, leading to passing a success code as an error. However, this driver cannot work without a regulator. To fix this: - Change the check from IS_ERR_OR_NULL() to IS_ERR() - Update Kconfig to explicitly select REGULATOR and REGULATOR_FIXED_VOLTAGE, ensuring that the regulator framework is always available. This resolves the Smatch warning and enforces the correct dependency. Suggested-by: Dan Carpenter <dan.carpenter@linaro.org> Fixes: 5b797bcc00ef ("pinctrl: eswin: Add EIC7700 pinctrl driver") Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Closes: https://lore.kernel.org/linux-gpio/aKRGiZ-fai0bv0tG@stanley.mountain/ Signed-off-by: Yulin Lu <luyulin@eswincomputing.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-08-22pinctrl: STMFX: add missing HAS_IOMEM dependencyRandy Dunlap1-0/+1
When building on ARCH=um (which does not set HAS_IOMEM), kconfig reports an unmet dependency caused by PINCTRL_STMFX. It selects MFD_STMFX, which depends on HAS_IOMEM. To stop this warning, PINCTRL_STMFX should also depend on HAS_IOMEM. kconfig warning: WARNING: unmet direct dependencies detected for MFD_STMFX Depends on [n]: HAS_IOMEM [=n] && I2C [=y] && OF [=y] Selected by [y]: - PINCTRL_STMFX [=y] && PINCTRL [=y] && I2C [=y] && OF_GPIO [=y] Fixes: 1490d9f841b1 ("pinctrl: Add STMFX GPIO expander Pinctrl/GPIO driver") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Link: https://lore.kernel.org/20250815022721.1650885-1-rdunlap@infradead.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-08-19pinctrl: sx150x: Make the driver tristateFange Zhang1-1/+1
Set PINCTRL_SX150X config option as a tristate and add MODULE_DEVICE_TABLE()/MODULE_LICENSE() to export appropriate information. Signed-off-by: Fange Zhang <fange.zhang@oss.qualcomm.com> Link: https://lore.kernel.org/20250818-modularize-sx150x-gpio-expander-v1-1-c2a027200fed@oss.qualcomm.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-08-18pinctrl: Add pin controller driver for AAEON UP boardsThomas Richard1-0/+19
This enables the pin control support of the onboard FPGA on AAEON UP boards. This FPGA acts as a level shifter between the Intel SoC pins and the pin header, and also as a mux or switch. +---------+ +--------------+ +---+ | | | | | | PWM0 | \ | | H | |----------|------ \-----|-------------| E | | I2C0_SDA | | | A | Intel SoC |----------|------\ | | D | | GPIO0 | \------|-------------| E | |----------|------ | | R | | | FPGA | | | ----------+ +--------------+ +---+ For most of the pins, the FPGA opens/closes a switch to enable/disable the access to the SoC pin from a pin header. Each switch, has a direction flag that is set depending the status of the SoC pin. For some other pins, the FPGA acts as a mux, and routes one pin (or the other one) to the header. The driver also provides a GPIO chip. It requests SoC pins in GPIO mode, and drives them in tandem with FPGA pins (switch/mux direction). This commit adds support only for UP Squared board. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Thomas Richard <thomas.richard@bootlin.com> Link: https://lore.kernel.org/20250811-aaeon-up-board-pinctrl-support-v9-10-29f0cbbdfb30@bootlin.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-08-02Merge tag 'pinctrl-v6.17-1' of ↵Linus Torvalds1-4/+17
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "Nothing stands out, apart from maybe the interesting Eswin EIC7700, a RISC-V SoC I've never seen before. Core changes: - Open code PINCTRL_FUNCTION_DESC() instead of defining a complex macro only used in one place - Add pinmux_generic_add_pinfunction() helper and use this in a few drivers New drivers: - Amlogic S7, S7D and S6 pin control support - Eswin EIC7700 pin control support - Qualcomm PMIV0104, PM7550 and Milos pin control support Because of unhelpful numbering schemes, the Qualcomm driver now needs to start to rely on SoC codenames - STM32 HDP pin control support - Mediatek MT8189 pin control support Improvements: - Switch remaining pin control drivers over to the new GPIO set callback that provides a return value - Support RSVD (reserved) pins in the STM32 driver - Move many fixed assignments over to pinctrl_desc definitions - Handle multiple TLMM regions in the Qualcomm driver" * tag 'pinctrl-v6.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (105 commits) pinctrl: mediatek: Add pinctrl driver for mt8189 dt-bindings: pinctrl: mediatek: Add support for mt8189 pinctrl: aspeed-g6: Add PCIe RC PERST pin group pinctrl: ingenic: use pinmux_generic_add_pinfunction() pinctrl: keembay: use pinmux_generic_add_pinfunction() pinctrl: mediatek: moore: use pinmux_generic_add_pinfunction() pinctrl: airoha: use pinmux_generic_add_pinfunction() pinctrl: equilibrium: use pinmux_generic_add_pinfunction() pinctrl: provide pinmux_generic_add_pinfunction() pinctrl: pinmux: open-code PINCTRL_FUNCTION_DESC() pinctrl: ma35: use new GPIO line value setter callbacks MAINTAINERS: add Clément Le Goffic as STM32 HDP maintainer pinctrl: stm32: Introduce HDP driver dt-bindings: pinctrl: stm32: Introduce HDP pinctrl: qcom: Add Milos pinctrl driver dt-bindings: pinctrl: document the Milos Top Level Mode Multiplexer pinctrl: qcom: spmi: Add PM7550 dt-bindings: pinctrl: qcom,pmic-gpio: Add PM7550 support pinctrl: qcom: spmi: Add PMIV0104 dt-bindings: pinctrl: qcom,pmic-gpio: Add PMIV0104 support ...
2025-06-24pinctrl: zynq: add CONFIG_OF dependencyArnd Bergmann1-0/+1
The zynq driver can be enabled for compile-testing on builds without CONFIG_OF, leading to a link error: ld.lld-21: error: undefined symbol: pinconf_generic_dt_node_to_map referenced by pinconf-generic.h:231 (/home/arnd/arm-soc/include/linux/pinctrl/pinconf-generic.h:231) drivers/pinctrl/pinctrl-zynq.o:(pinconf_generic_dt_node_to_map_all) in archive vmlinux.a Prevent this with the proper compile time dependency. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202506212021.deAhuaWr-lkp@intel.com/ Fixes: 1982621decaf ("pinctrl: Allow compile testing for K210, TB10X and ZYNQ") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/20250620130814.2580678-1-arnd@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-06-18pinctrl: eswin: Add EIC7700 pinctrl driverYulin Lu1-0/+11
Add support for the pin controller in ESWIN's EIC7700 SoC, which supports pin multiplexing, pin configuration, and rgmii voltage control. Co-developed-by: Samuel Holland <samuel.holland@sifive.com> Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Signed-off-by: Yulin Lu <luyulin@eswincomputing.com> Link: https://lore.kernel.org/20250612105159.1241-1-luyulin@eswincomputing.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-06-18pinctrl: Allow compile testing for K210, TB10X and ZYNQKrzysztof Kozlowski1-4/+5
Pinctrl drivers for K210, TB10X and ZYNQ do not reference any machine headers, thus can be compile tested for increased build coverage. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/20250611-pinctrl-const-desc-v2-2-b11c1d650384@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-06-16pinctrl: rp1: Implement RaspberryPi RP1 gpio supportAndrea della Porta1-0/+11
The RP1 is an MFD supporting a gpio controller and /pinmux/pinctrl. Add minimum support for the gpio only portion. The driver is in pinctrl folder since upcoming patches will add the pinmux/pinctrl support where the gpio part can be seen as an addition. Signed-off-by: Andrea della Porta <andrea.porta@suse.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Stefan Wahren <wahrenst@gmx.net> Link: https://lore.kernel.org/r/20250529135052.28398-5-andrea.porta@suse.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-05-08pinctrl: at91: drop unneeded dependency on OF_GPIOBartosz Golaszewski1-1/+0
This driver does not use any symbols from gpiolib-of.c. There's no reason for it to select OF_GPIO directly. This addresses a kismet issue reported by the build bot. Fixes: 8e86af65f39d ("pinctrl: at91: allow building the module with COMPILE_TEST=y") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202505010447.kUlI61vt-lkp@intel.com/ Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/20250502100841.113091-1-brgl@bgdev.pl Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-04-29pinctrl: at91: allow building the module with COMPILE_TEST=yBartosz Golaszewski1-2/+1
Extend the build coverage by allowing to build the module with COMPILE_TEST enabled. We can do this as the driver doesn't depend on any architecture-specific bits. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/20250424-gpiochip-set-rv-pinctrl-part2-v1-8-504f91120b99@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-03-18pinctrl: PINCTRL_AMDISP should depend on DRM_AMD_ISPGeert Uytterhoeven1-0/+1
The AMD Image Signal Processor GPIO pin control functionality is only present on AMD platforms with ISP support, and its platform device is instantiated by the AMD ISP driver. Hence add a dependency on DRM_AMD_ISP, to prevent asking the user about this driver when configuring a kernel that does not support the AMD ISP. Fixes: e97435ab09f3ad7b ("pinctrl: amd: isp411: Add amdisp GPIO pinctrl") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/3685561e8e3cd1d94bce220eeb6001d659da615c.1742306024.git.geert+renesas@glider.be Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-03-05pinctrl: amd: isp411: Add amdisp GPIO pinctrlPratap Nirujogi1-0/+13
Add pinctrl driver support for AMD SoC with isp41 hw ip block. Signed-off-by: Pratap Nirujogi <pratap.nirujogi@amd.com> Link: https://lore.kernel.org/20250304232051.2936557-1-pratap.nirujogi@amd.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-19pinctrl: spacemit: add support for SpacemiT K1 SoCYixun Lan1-0/+1
SpacemiT's K1 SoC has a pinctrl controller which use single register to describe all functions, which include bias pull up/down(strong pull), drive strength, schmitter trigger, slew rate, mux mode. Signed-off-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/20241016-02-k1-pinctrl-v5-2-03d395222e4f@gentoo.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-15pinctrl: PINCTRL_K230 should depend on ARCH_CANAANGeert Uytterhoeven1-0/+1
The Canaan Kendryte K230 pin controller is only present on Canaan Kendryte K230 SoCs. Hence add a dependency on ARCH_CANAAN, to prevent asking the user about this driver when configuring a kernel without Canaan Kendryte series SoC platform support. Fixes: 545887eab6f6776a ("pinctrl: canaan: Add support for k230 SoC") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/d70279ba02a67250203744b38314f4475b3c5671.1728986052.git.geert+renesas@glider.be Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-15pinctrl: th1520: add a CONFIG_OF dependencyArnd Bergmann1-0/+1
When compile-testing without CONfIG_OF: drivers/pinctrl/pinctrl-th1520.c: In function 'th1520_pinctrl_dt_node_to_map': drivers/pinctrl/pinctrl-th1520.c:455:23: error: implicit declaration of function 'pinconf_generic_parse_dt_config'; did you mean 'pinconf_generic_dump_config'? [-Wimplicit-function-declaration] 455 | ret = pinconf_generic_parse_dt_config(child, pctldev, &configs, &nconfigs); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | pinconf_generic_dump_config Enforce this using Kconig dependencies. Fixes: bed5cd6f8a98 ("pinctrl: Add driver for the T-Head TH1520 SoC") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Drew Fustini <drew@pdp7.com> Link: https://lore.kernel.org/20241015151126.2401855-1-arnd@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-01pinctrl: canaan: Add support for k230 SoCZe Huang1-0/+10
Configuration of the K230 is similar to that of the K210. However, in K210, the 256 functions for each pin are shared, whereas in K230, multiplex functions are different for every pin. `drv_data` of `pinctrl_pin_desc` is pointing to currently activated group, which is used to print the name of current function of pin in `pin_dbg_show` and will be updated in `set_mux`, so they are not set const. Signed-off-by: Ze Huang <18771902331@163.com> Link: https://lore.kernel.org/20240926-k230-pinctrl-v2-2-a9a36fba4b34@163.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-01pinctrl: Add driver for the T-Head TH1520 SoCEmil Renner Berthing1-0/+13
Add pinctrl driver for the T-Head TH1520 RISC-V SoC. Tested-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com> Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> [dfustini: use thead,pad-group to identify the pin controller instance] Signed-off-by: Drew Fustini <dfustini@tenstorrent.com> Link: https://lore.kernel.org/20240930-th1520-pinctrl-v3-2-32cea2bdbecb@tenstorrent.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-09-26Merge tag 'soc-ep93xx-dt-6.12' of ↵Linus Torvalds1-0/+7
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC update from Arnd Bergmann: "Convert ep93xx to devicetree This concludes a long journey towards replacing the old board files with devictree description on the Cirrus Logic EP93xx platform. Nikita Shubin has been working on this for a long time, for details see the last post on https://lore.kernel.org/lkml/20240909-ep93xx-v12-0-e86ab2423d4b@maquefel.me/" * tag 'soc-ep93xx-dt-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (47 commits) dt-bindings: gpio: ep9301: Add missing "#interrupt-cells" to examples MAINTAINERS: Update EP93XX ARM ARCHITECTURE maintainer soc: ep93xx: drop reference to removed EP93XX_SOC_COMMON config net: cirrus: use u8 for addr to calm down sparse dmaengine: cirrus: use snprintf() to calm down gcc 13.3.0 dmaengine: ep93xx: Fix a NULL vs IS_ERR() check in probe() pinctrl: ep93xx: Fix raster pins typo spi: ep93xx: update kerneldoc comments for ep93xx_spi clk: ep93xx: Fix off by one in ep93xx_div_recalc_rate() clk: ep93xx: add module license dmaengine: cirrus: remove platform code ASoC: cirrus: edb93xx: Delete driver ARM: ep93xx: soc: drop defines ARM: ep93xx: delete all boardfiles ata: pata_ep93xx: remove legacy pinctrl use pwm: ep93xx: drop legacy pinctrl ARM: ep93xx: DT for the Cirrus ep93xx SoC platforms ARM: dts: ep93xx: Add EDB9302 DT ARM: dts: ep93xx: add ts7250 board ARM: dts: add Cirrus EP93XX SoC .dtsi ...
2024-09-12pinctrl: add a Cirrus ep93xx SoC pin controllerNikita Shubin1-0/+7
Add a pin control (only multiplexing) driver for ep93xx SoC so we can fully convert ep93xx to device tree. This driver is capable of muxing ep9301/ep9302/ep9307/ep9312/ep9315 variants, this is chosen based on "compatible" in device tree. Co-developed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Signed-off-by: Nikita Shubin <nikita.shubin@maquefel.me> Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-08-26Merge branch 'ib-sophgo-pintrl' into develLinus Walleij1-0/+1
Immutable branch for the SoC tree, merge to pinctrl devel proper. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-26pinctrl: sophgo: add support for CV1800B SoCInochi Amaoto1-0/+1
Sophgo CV1800 series SoCs share common control logic but have different register mapping. For maintenance, split the driver and pin definition of the SoC. Add base driver for CV1800 series SoC and pin definition of CV1800B. Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Link: https://lore.kernel.org/IA1PR20MB4953B260E04EC53F6A01EB30BBB32@IA1PR20MB4953.namprd20.prod.outlook.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-04pinctrl: eyeq5: add platform driverThéo Lebrun1-0/+15
Add the Mobileye EyeQ5 pin controller driver. It belongs to a syscon region called OLB and gets spawned as auxiliary device to the platform driver for clock. Existing pins and their function live statically in the driver code rather than in the devicetree, see compatible match data. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Link: https://lore.kernel.org/20240730-mbly-pinctrl-v2-2-d470f64e0395@bootlin.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-05-07Merge tag 'riscv-config-for-v6.10' of ↵Arnd Bergmann1-2/+2
https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers RISC-V SoC Kconfig Updates for v6.10 A few different bits of SoC-related Kconfig work. The first part of this is shared with the DT updates - the modification of all SOC_CANAAN users to SOC_CANAAN_K210 to split the existing m-mode nommu k210 away from the k230 that is able to be used in a "common" kernel. The other thing here is the removal of most of the SOC_VENDOR options, with their ARCH_VENDOR equivalents that've been waiting in the wings for 1 year+ now made visible. Due a lapse on my part when originally adding the ARCH_VENDOR stuff, the Microchip transition isn't complete - the _POLARFIRE was a mistake to keep as there's gonna be non-PolarFire RISC-V stuff from Microchip soonTM. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-config-for-v6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: riscv: config: enable ARCH_CANAAN in defconfig RISC-V: drop SOC_VIRT for ARCH_VIRT RISC-V: drop SOC_SIFIVE for ARCH_SIFIVE RISC-V: drop SOC_MICROCHIP_POLARFIRE for ARCH_MICROCHIP RISC-V: Drop unused SOC_CANAAN reset: k210: Deprecate SOC_CANAAN and use SOC_CANAAN_K210 pinctrl: k210: Deprecate SOC_CANAAN and use SOC_CANAAN_K210 clk: k210: Deprecate SOC_CANAAN and use SOC_CANAAN_K210 soc: canaan: Deprecate SOC_CANAAN and use SOC_CANAAN_K210 for K210 riscv: Kconfig.socs: Split ARCH_CANAAN and SOC_CANAAN_K210 Link: https://lore.kernel.org/r/20240503-mardi-underling-3d81a9f97329@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-19pinctrl: Implementation of the generic scmi-pinctrl driverPeng Fan1-0/+11
scmi-pinctrl driver implements pinctrl driver interface and using SCMI protocol to redirect messages from pinctrl subsystem SDK to SCMI platform firmware, which does the changes in HW. Co-developed-by: Oleksii Moisieiev <oleksii_moisieiev@epam.com> Signed-off-by: Oleksii Moisieiev <oleksii_moisieiev@epam.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20240418-pinctrl-scmi-v11-4-499dca9864a7@nxp.com Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2024-04-05pinctrl: k210: Deprecate SOC_CANAAN and use SOC_CANAAN_K210Yangyu Chen1-2/+2
Since SOC_FOO should be deprecated from patch [1], and cleanup for other SoCs is already in the mailing list [2,3,4], we remove the use of SOC_CANAAN and introduced SOC_CANAAN_K210 for K210-specific drivers, Thus, we replace its drivers depends on SOC_CANAAN_K210 and default select when it has the symbol SOC_CANAAN_K210. [1] https://lore.kernel.org/linux-riscv/20221121221414.109965-1-conor@kernel.org/ [2] https://lore.kernel.org/linux-riscv/20240305-praying-clad-c4fbcaa7ed0a@spud/ [3] https://lore.kernel.org/linux-riscv/20240305-fled-undrilled-41dc0c46bb29@spud/ [4] https://lore.kernel.org/linux-riscv/20240305-stress-earflap-d7ddb8655a4d@spud/ Signed-off-by: Yangyu Chen <cyy@cyyself.name> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2024-03-07pinctrl: aw9523: Make the driver tristateLinus Walleij1-1/+1
The AW9523 driver fails to build in some allmod configs since the I2C core can be a module, but AW9523 can not. Fix it up by allowing AW9523 to be a module (tristate). Fixes: 576623d70661 ("pinctrl: Add driver for Awinic AW9523/B I2C GPIO Expander") Reported-by: Arnd Bergmann <arnd@arndb.de> Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202403050916.KBtE6eEj-lkp@intel.com/ Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240305-fix-aw9523-v2-1-2dc50bab2b17@linaro.org
2024-03-05pinctrl: Add driver for Awinic AW9523/B I2C GPIO ExpanderAngeloGioacchino Del Regno1-0/+18
The Awinic AW9523(B) is a multi-function I2C gpio expander in a TQFN-24L package, featuring PWM (max 37mA per pin, or total max power 3.2Watts) for LED driving capability. It has two ports with 8 pins per port (for a total of 16 pins), configurable as either PWM with 1/256 stepping or GPIO input/output, 1.8V logic input; each GPIO can be configured as input or output independently from each other. This IC also has an internal interrupt controller, which is capable of generating an interrupt for each GPIO, depending on the configuration, and will raise an interrupt on the INTN pin to advertise this to an external interrupt controller. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: David Bauer <mail@david-bauer.net> Link: https://lore.kernel.org/r/20210624214458.68716-2-mail@david-bauer.net Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240301-awinic-aw9523-v8-1-7ec572f5dfb4@linaro.org
2023-12-12Merge tag 'pef2256-framer' into develLinus Walleij1-0/+15
Immutable tag for the PEF2256 framer
2023-12-12pinctrl: Add support for the Lantic PEF2256 pinmuxHerve Codina1-0/+15
The Lantiq PEF2256 is a framer and line interface component designed to fulfill all required interfacing between an analog E1/T1/J1 line and the digital PCM system highway/H.100 bus. This kind of component can be found in old telecommunication system. It was used to digital transmission of many simultaneous telephone calls by time-division multiplexing. Also using HDLC protocol, WAN networks can be reached through the framer. This pinmux support handles the pin muxing part (pins RP(A..D) and pins XP(A..D)) of the PEF2256. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20231128132534.258459-5-herve.codina@bootlin.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-11-14pinctrl: tps6594: Add driver for TPS6594 pinctrl and GPIOsEsteban Blanc1-0/+16
TI TPS6594 PMIC has 11 GPIOs which can be used for different functions. This patch adds a pinctrl and GPIO drivers in order to use those functions. Signed-off-by: Esteban Blanc <eblanc@baylibre.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20231108104124.2818275-1-eblanc@baylibre.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-09-20pinctrl: realtek: Add common pinctrl driver for Realtek DHC RTD SoCsTzuyi Chang1-0/+1
The RTD SoCs share a similar design for pinmux and pinconfig. This common pinctrl driver supports different variants within the RTD SoCs. Signed-off-by: Tzuyi Chang <tychang@realtek.com> Link: https://lore.kernel.org/r/20230919101117.4097-2-tychang@realtek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-08-15pinctrl: pinctrl-oxnas: remove obsolete pinctrl driverNeil Armstrong1-11/+0
Due to lack of maintenance and stall of development for a few years now, and since no new features will ever be added upstream, remove support for OX810 and OX820 pinctrl & gpio. Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Daniel Golle <daniel@makrotopia.org> Acked-by: Andy Shevchenko <andy@kernel.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230814-topic-oxnas-upstream-remove-v3-1-04a0c5cdda52@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-06-30Merge tag 'pinctrl-v6.5-1' of ↵Linus Torvalds1-1/+0
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "No core changes this time New drivers: - Tegra234 support - Qualcomm IPQ5018 support - Intel Meteor Lake-S support - Qualcomm SDX75 subdriver - Qualcomm SPMI-based PM8953 support Improvements: - Fix up support for GPIO3 on the AXP209 - Push-pull drive configuration support for the AT91 PIO4 - Fix misc non-urgent bugs in the AMD driver - Misc non-urgent improved error handling - Misc janitorial and minor improvements" * tag 'pinctrl-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (75 commits) pinctrl: cherryview: Drop goto label pinctrl: baytrail: invert if condition pinctrl: baytrail: add warning for BYT_VAL_REG retrieval failure pinctrl: baytrail: reduce scope of spinlock in ->dbg_show() hook pinctrl: tegra: avoid duplicate field initializers dt-bindings: pinctrl: qcom,sdx65-tlmm: add pcie_clkreq function pinctrl: mlxbf3: remove broken Kconfig 'select' pinctrl: spear: Remove unused of_gpio.h inclusion pinctrl: lantiq: Remove unused of_gpio.h inclusion pinctrl: at91-pio4: check return value of devm_kasprintf() pinctrl: microchip-sgpio: check return value of devm_kasprintf() pinctrl: freescale: Fix a memory out of bounds when num_configs is 1 pinctrl: intel: refine ->irq_set_type() hook pinctrl: intel: refine ->set_mux() hook pinctrl: baytrail: Use str_hi_lo() helper lib/string_choices: Add str_high_low() helper lib/string_helpers: Split out string_choices.h lib/string_helpers: Add missing header files to MAINTAINERS database pinctrl: npcm7xx: Add missing check for ioremap pinctrl:sunplus: Add check for kmalloc ...
2023-06-19pinctrl: mlxbf3: remove broken Kconfig 'select'Arnd Bergmann1-1/+0
The new pinctrl driver selects GPIO_MLXBF3, but that can not be enabled yet because the MELLANOX_PLATFORM symbol does not exist in the tree: WARNING: unmet direct dependencies detected for GPIO_MLXBF3 Depends on [n]: GPIOLIB [=y] && PCI [=n] && (MELLANOX_PLATFORM [=n] && ARM64 [=y] || COMPILE_TEST [=y]) Selected by [y]: - PINCTRL_MLXBF3 [=y] && PINCTRL [=y] && (MELLANOX_PLATFORM [=n] && ARM64 [=y] || COMPILE_TEST [=y]) As it turns out, the pinctlr driver still builds fine without this, so just remove the select statement. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20230619082104.699331-1-arnd@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-05-15mfd: rk808: Split into core and i2cSebastian Reichel1-1/+1
Split rk808 into a core and an i2c part in preparation for SPI support. Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> # for RTC Tested-by: Diederik de Haas <didi.debian@cknow.org> # Rock64, Quartz64 Model A + B Tested-by: Vincent Legoll <vincent.legoll@gmail.com> # Pine64 QuartzPro64 Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20230504173618.142075-6-sebastian.reichel@collabora.com Signed-off-by: Lee Jones <lee@kernel.org>
2023-04-04pinctrl: Remove Intel Thunder Bay pinctrl driverLakshmi Sowjanya D1-19/+0
Remove Thunder Bay specific code as the product got cancelled and there are no end customers or users. Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com> Link: https://lore.kernel.org/r/20230403120235.939-1-lakshmi.sowjanya.d@intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19pinctrl: mlxbf3: Add pinctrl driver supportAsmaa Mnebhi1-0/+13
NVIDIA BlueField-3 SoC has a few pins that can be used as GPIOs or take the default hardware functionality. Add a driver for the pin muxing. Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20230315215027.30685-3-asmaa@nvidia.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-19pinctrl: ralink: move to mediatek as mtmipsArınç ÜNAL1-1/+0
This platform from Ralink was acquired by MediaTek in 2011. Then, MediaTek introduced new SoCs which utilise this platform. Move the driver to mediatek pinctrl directory. Rename the ralink core driver to mtmips. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Link: https://lore.kernel.org/r/20230317213011.13656-5-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-03-06pinctrl: add NXP S32 SoC family supportChester Lin1-0/+1
Add the pinctrl driver for NXP S32 SoC family. This driver is mainly based on NXP's downstream implementation on nxp-auto-linux repo[1]. [1] https://github.com/nxp-auto-linux/linux/tree/bsp35.0-5.15.73-rt/drivers/pinctrl/freescale Signed-off-by: Matthew Nunez <matthew.nunez@nxp.com> Signed-off-by: Phu Luu An <phu.luuan@nxp.com> Signed-off-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com> Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com> Signed-off-by: Ghennadi Procopciuc <Ghennadi.Procopciuc@oss.nxp.com> Signed-off-by: Andrei Stefanescu <andrei.stefanescu@nxp.com> Signed-off-by: Radu Pirea <radu-nicolae.pirea@nxp.com> Signed-off-by: Chester Lin <clin@suse.com> Link: https://lore.kernel.org/r/20230220023320.3499-3-clin@suse.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-16pinctrl: digicolor: Use proper headers and drop OF dependencyAndy Shevchenko1-1/+1
The driver doesn't depend on the OF to be complied. Hence the proper header to use is mod_devicetable.h. Replace of*.h with the above mentioned and drop redundant dependency. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Baruch Siach <baruch@tkos.co.il> Link: https://lore.kernel.org/r/20230113143640.24302-2-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-11-21pinctrl: pinctrl-loongson2: fix Kconfig dependencyRen Zhijie1-1/+1
If CONFIG_PINCTRL_LOONGSON2=y and CONFIG_OF is not set, gcc complained about undefined reference: drivers/pinctrl/pinctrl-loongson2.o: In function `pinconf_generic_dt_node_to_map_all': pinctrl-loongson2.c:(.text+0x1c4): undefined reference to `pinconf_generic_dt_node_to_map' To fix this error, add depends on OF to config PINCTRL_LOONGSON2. Fixes: f73f88acbc18 ("pinctrl: pinctrl-loongson2: add pinctrl driver support") Signed-off-by: Ren Zhijie <renzhijie2@huawei.com> Link: https://lore.kernel.org/r/20221121132608.230645-1-renzhijie2@huawei.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-11-17pinctrl: pinctrl-loongson2: add pinctrl driver supportzhanghongchen1-0/+11
The Loongson-2 SoC has a few pins that can be used as GPIOs or take multiple other functions. Add a driver for the pinmuxing. There is currently no support for GPIO pin pull-up and pull-down. Signed-off-by: zhanghongchen <zhanghongchen@loongson.cn> Co-developed-by: Yinbo Zhu <zhuyinbo@loongson.cn> Signed-off-by: Yinbo Zhu <zhuyinbo@loongson.cn> Link: https://lore.kernel.org/r/20221114024942.8111-1-zhuyinbo@loongson.cn Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-10-11Merge tag 'pinctrl-v6.1-1' of ↵Linus Torvalds1-17/+20
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "There is nothing exciting going on, no core changes, just a few drivers and cleanups. New drivers: - Cypress CY8C95x0 chip pin control support, along with an immediate cleanup - Mediatek MT8188 SoC pin control support - Qualcomm SM8450 and SC8280XP LPASS (low power audio subsystem) pin control support - Qualcomm PM7250, PM8450 - Rockchip RV1126 SoC pin control support Improvements: - Fix some missing pins in the Armada 37xx driver - Convert Broadcom and Nomadik drivers to use PINCTRL_PINGROUP() macro - Fix some GPIO irq_chips to be immutable - Massive Qualcomm device tree binding cleanup, with more to come" * tag 'pinctrl-v6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (119 commits) MAINTAINERS: adjust STARFIVE JH7100 PINCTRL DRIVER after file movement pinctrl: starfive: Rename "pinctrl-starfive" to "pinctrl-starfive-jh7100" pinctrl: Create subdirectory for StarFive drivers dt-bindings: pinctrl: st,stm32: Document interrupt-controller property dt-bindings: pinctrl: st,stm32: Document gpio-hog pattern property dt-bindings: pinctrl: st,stm32: Document gpio-line-names pinctrl: st: stop abusing of_get_named_gpio() pinctrl: wpcm450: Correct the fwnode_irq_get() return value check pinctrl: bcm: Remove unused struct bcm6328_pingroup pinctrl: qcom: restrict drivers per ARM/ARM64 pinctrl: bcm: ns: Remove redundant dev_err call gpio: rockchip: request GPIO mux to pinctrl when setting direction pinctrl: rockchip: add pinmux_ops.gpio_set_direction callback pinctrl: cy8c95x0: Align function names in cy8c95x0_pmxops pinctrl: cy8c95x0: Drop atomicity on operations on push_pull pinctrl: cy8c95x0: Lock register accesses in cy8c95x0_set_mux() pinctrl: sunxi: sun50i-h5: Switch to use dev_err_probe() helper pinctrl: stm32: Switch to use dev_err_probe() helper dt-bindings: qcom-pmic-gpio: Add PM7250B and PM8450 bindings pinctrl: qcom: spmi-gpio: Add compatible for PM7250B ...
2022-10-04pinctrl: Create subdirectory for StarFive driversJianlong Huang1-17/+1
Move the StarFive JH7100 pinctrl driver to a new subdirectory in preparation for adding more StarFive pinctrl drivers. No functional change. Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> Signed-off-by: Hal Feng <hal.feng@linux.starfivetech.com> Link: https://lore.kernel.org/r/20220930060819.5320-1-hal.feng@linux.starfivetech.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-09-14pinctrl: ocelot: add help and description information to ocelot pinctrl kconfigColin Foster1-0/+5
Add missed help information and module export name to the Microsemi Ocelot and Jaguar2 SoC. Signed-off-by: Colin Foster <colin.foster@in-advantage.com> Link: https://lore.kernel.org/r/20220909153802.3370088-1-colin.foster@in-advantage.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-09-09pinctrl: microchip-sgpio: allow sgpio driver to be used as a moduleColin Foster1-1/+4
As the commit message suggests, this simply adds the ability to select SGPIO pinctrl as a module. This becomes more practical when the SGPIO hardware exists on an external chip, controlled indirectly by I2C or SPI. This commit enables that level of control. Signed-off-by: Colin Foster <colin.foster@in-advantage.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20220905162132.2943088-5-colin.foster@in-advantage.com
generated by cgit v1.2.3 (git 2.39.1) at 2025-12-27 18:23:28 +0000