aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/pinctrl/mediatek (follow)
AgeCommit message (Collapse)AuthorFilesLines
2025-10-01Merge tag 'pinctrl-v6.18-1' of ↵Linus Torvalds12-62/+42
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "We have GPIO awareness in the pin control core and an interesting AAEON driver. Core changes: - Allow pins to be identified/marked as GPIO mode with a special callback. The pin controller core is now "aware" if a pin is in GPIO mode if the callback is implemented in the driver, and can thus be marked as "strict", i.e. disallowing simultaneous use of a line as GPIO and another function such as I2C. This is enabled in the Qualcomm TLMM driver and also implemeted from day 1 in the new Broadcom STB driver - Rename the pin config option PIN_CONFIG_OUTPUT to PIN_CONFIG_LEVEL to better describe what the config is doing, as well as making it more intuitive what shall be returned when reading this property New drivers: - Qualcomm SDM660 LPASS LPI TLMM pin controller subdriver - Qualcomm Glymur family pin controller driver - Broadcom STB family pin controller driver - Tegra186 pin controller driver - AAEON UP pin controller support. This is some special pin controller that works as an external advanced line MUX and amplifier for signals from an Intel SoC. A cooperative effort with the GPIO maintainer was needed to reach a solution where we reuse code from the GPIO aggregator/forwarder driver - Renesas RZ/T2H and RZ/N2H pin controller support - Axis ARTPEC-8 subdriver for the Samsung pin controller driver Improvements: - Output enable (OEN) support in the Renesas RZG2L driver - Properly support bias pull up/down in the pinctrl-single driver - Move over all GPIO portions using generic MMIO GPIO to the new generic GPIO chip management which has a nice and separate API - Proper DT bindings for some older Broadcom SoCs - External GPIO (EGPIO) support in the Qualcomm SM8250 Deleted code: - Dropped the now unused Samsung S3C24xx drivers" * tag 'pinctrl-v6.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (75 commits) pinctrl: use more common syntax for compound literals pinctrl: Simplify printks with pOF format pinctrl: qcom: Add SDM660 LPASS LPI TLMM dt-bindings: pinctrl: qcom: Add SDM660 LPI pinctrl pinctrl: qcom: lpass-lpi: Add ability to use custom pin offsets pinctrl: qcom: Add glymur pinctrl driver dt-bindings: pinctrl: qcom: Add Glymur pinctrl pinctrl: qcom: sm8250: Add egpio support pinctrl: generic: rename PIN_CONFIG_OUTPUT to LEVEL pinctrl: keembay: fix double free in keembay_build_functions() pinctrl: spacemit: fix typo in PRI_TDI pin name pinctrl: eswin: Fix regulator error check and Kconfig dependency pinctrl: bcm: Add STB family pin controller driver dt-bindings: pinctrl: Add support for Broadcom STB pin controller pinctrl: qcom: make the pinmuxing strict pinctrl: qcom: mark the `gpio` and `egpio` pins function as non-strict functions pinctrl: qcom: add infrastructure for marking pin functions as GPIOs pinctrl: allow to mark pin functions as requestable GPIOs pinctrl: qcom: use generic pin function helpers pinctrl: make struct pinfunction a pointer in struct function_desc ...
2025-09-08pinctrl: airoha: fix wrong MDIO function bitmaksChristian Marangi1-6/+9
With further testing with an attached Aeonsemi it was discovered that the pinctrl MDIO function applied the wrong bitmask. The error was probably caused by the confusing documentation related to these bits. Inspecting what the bootloader actually configure, the SGMII_MDIO_MODE is never actually set but instead it's set force enable to the 2 GPIO (gpio 1-2) for MDC and MDIO pin. The usage of GPIO might be confusing but this is just to instruct the SoC to not mess with those 2 PIN and as Benjamin reported it's also an Errata of 7581. The FORCE_GPIO_EN doesn't set them as GPIO function (that is configured by a different register) but it's really to actually ""enable"" those lines. Normally the SoC should autodetect this by HW but it seems AN7581 have problem with this and require this workaround to force enable the 2 pin. Applying this configuration permits correct functionality of any externally attached PHY. Cc: stable@vger.kernel.org Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC") Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Acked-by: Benjamin Larsson <benjamin.larsson@genexis.eu> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-09-08pinctrl: airoha: fix wrong PHY LED mux value for LED1 GPIO46Christian Marangi1-8/+8
In all the MUX value for LED1 GPIO46 there is a Copy-Paste error where the MUX value is set to LED0_MODE_MASK instead of LED1_MODE_MASK. This wasn't notice as there were no board that made use of the secondary PHY LED but looking at the internal Documentation the actual value should be LED1_MODE_MASK similar to the other GPIO entry. Fix the wrong value to apply the correct MUX configuration. Cc: stable@vger.kernel.org Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC") Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Acked-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-09-08pinctrl: generic: rename PIN_CONFIG_OUTPUT to LEVELLinus Walleij4-6/+6
This generic pin config property is confusingly named so let's rename it to make things clearer. There are already drivers in the tree that use PIN_CONFIG_OUTPUT to *read* the value of an output driven pin, which is a big semantic confusion for the head: are we then reading the setting of the output or the actual value/level that is put out on the pin? We already have PIN_CONFIG_OUTPUT_ENABLE that turns on driver buffers for output, so this can by logical conclusion only drive the voltage level if it should be any different. But if we read the pin, are we then reading the *setting* of the output value or the *actual* value we can see on the line? If the pin has not first been set into output mode with PIN_CONFIG_OUTPUT_ENABLE, but is instead in some input mode or tristate, what will reading this property actually return? Reading the current users reading this property it is clear that what we read is the logical level of the pin as 0 or 1 depending on if it is low or high. Rename it to PIN_CONFIG_LEVEL so it is crystal clear that we set or read the voltage level of the pin and nothing else. Acked-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-09-08pinctrl: make struct pinfunction a pointer in struct function_descBartosz Golaszewski2-2/+2
We currently duplicate the entire struct pinfunction object in pinmux_generic_add_pinfunction(). While this is inevitable when the arguments come in split through pinmux_generic_add_function(), users of pinmux_generic_add_pinfunction() will typically pass addresses of structures in .rodata, meaning we can try to avoid the duplication with the help from kmemdup_const(). To that end: don't wrap the entire struct pinfunction in struct function_desc but rather just store the address. Tested-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-09-08pinctrl: constify pinmux_generic_get_function()Bartosz Golaszewski2-2/+2
With all users of struct function_desc limited to only accessing it using the dedicated function and never modifying it, we can now constify the return value of pinmux_generic_get_function() treewide. Reviewed-by: Andy Shevchenko <andy@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> # renesas Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> # renesas Tested-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-09-08pinctrl: mediatek: moore: replace struct function_desc with struct pinfunctionBartosz Golaszewski9-16/+11
struct function_desc is a wrapper around struct pinfunction with an additional void *data pointer. This driver doesn't use the data pointer. We're also working towards reducing the usage of struct function_desc in pinctrl drivers - they should only be created by pinmux core and accessed by drivers using pinmux_generic_get_function(). Replace the struct function_desc objects in this driver with smaller struct pinfunction instances. Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-09-08pinctrl: mediatek: mt7988: use PINCTRL_PIN_FUNCTION()Bartosz Golaszewski1-26/+16
We have a dedicated initializer macro for defining pin functions for mediatek drivers so use it here. Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: Andy Shevchenko <andy@kernel.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-09-08pinctrl: airoha: replace struct function_desc with struct pinfunctionBartosz Golaszewski1-10/+5
struct function_desc is a wrapper around struct pinfunction with an additional void *data pointer. This driver doesn't use the data pointer. We're also working towards reducing the usage of struct function_desc in pinctrl drivers - they should only be created by pinmux core and accessed by drivers using pinmux_generic_get_function(). Replace the struct function_desc objects in this driver with smaller struct pinfunction instances. Tested-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-08-22pinctrl: airoha: Fix return value in pinconf callbacksLorenzo Bianconi1-4/+4
Pinctrl stack requires ENOTSUPP error code if the parameter is not supported by the pinctrl driver. Fix the returned error code in pinconf callbacks if the operation is not supported. Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC") Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Link: https://lore.kernel.org/20250822-airoha-pinconf-err-val-fix-v1-1-87b4f264ced2@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-08-07treewide: rename GPIO set callbacks back to their original namesBartosz Golaszewski4-4/+4
The conversion of all GPIO drivers to using the .set_rv() and .set_multiple_rv() callbacks from struct gpio_chip (which - unlike their predecessors - return an integer and allow the controller drivers to indicate failures to users) is now complete and the legacy ones have been removed. Rename the new callbacks back to their original names in one sweeping change. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-07-23pinctrl: mediatek: Add pinctrl driver for mt8189Cathy Xu4-0/+4165
Add pinctrl driver support for MediaTek Soc mt8189. Signed-off-by: Cathy Xu <ot_cathy.xu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/20250711094513.17073-4-ot_cathy.xu@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-07-19pinctrl: mediatek: moore: use pinmux_generic_add_pinfunction()Bartosz Golaszewski1-3/+2
Instead of passing individual fields of struct pinfunction to pinmux_generic_add_function(), use pinmux_generic_add_pinfunction() and pass the entire structure directly. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/20250709-pinctrl-gpio-pinfuncs-v2-5-b6135149c0d9@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-07-19pinctrl: airoha: use pinmux_generic_add_pinfunction()Bartosz Golaszewski1-5/+3
Instead of passing individual fields of struct pinfunction to pinmux_generic_add_function(), use pinmux_generic_add_pinfunction() and pass the entire structure directly. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/20250709-pinctrl-gpio-pinfuncs-v2-4-b6135149c0d9@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-06-18pinctrl: Use dev_fwnode()Jiri Slaby (SUSE)1-2/+2
irq_domain_create_simple() takes fwnode as the first argument. It can be extracted from the struct device using dev_fwnode() helper instead of using of_node with of_fwnode_handle(). So use the dev_fwnode() helper. Signed-off-by: Jiri Slaby (SUSE) <jirislaby@kernel.org> Acked-by: Chen-Yu Tsai <wens@sie.org> Link: https://lore.kernel.org/20250611104348.192092-17-jirislaby@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-06-18pinctrl: Constify static 'pinctrl_desc'Krzysztof Kozlowski1-1/+1
The local static 'struct pinctrl_desc' is not modified, so can be made const for code safety. Acked-by: Lorenzo Bianconi <lorenzo@kernel.org> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Hal Feng <hal.feng@starfivetech.com> Acked-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Acked-by: Vladimir Zapolskiy <vz@mleia.com> Link: https://lore.kernel.org/20250611-pinctrl-const-desc-v2-16-b11c1d650384@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-05-30Merge tag 'pinctrl-v6.16-1' of ↵Linus Torvalds13-69/+8189
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "An especially linear and sparse improvement and new drivers release. Nothing exciting. The biggest change in Bartosz changes to make gpiochip set/get calls return error codes (something we should have fixed ages ago but is now finally getting fixed.) Core changes: - Add the devres devm_pinctrl_register_mappings() call that can register some pin control machine mappings and have them go away with the associated device New drivers: - Support for the Mediatek MT6893 and MT8196 SoCs - Support for the Renesas RZ/V2N SoC - Support for the NXP Freescale i.MX943 SoC Improvements: - Per-SoC suspend/resume callbacks in the Samsung drivers - Set all pins as input (High-Z) at probe in the MCP23S08 driver - Switch most GPIO chips to use the setters/getters with a return value - EGPIO support in the Qualcomm QCM2290 driver - Fix up the number of available GPIO lines in Qualcomm QCS8300 and QCS615" * tag 'pinctrl-v6.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (82 commits) pinctrl: freescale: Add support for imx943 pinctrl pinctrl: core: add devm_pinctrl_register_mappings() pinctrl: remove extern specifier for functions in machine.h pinctrl: mediatek: eint: Fix invalid pointer dereference for v1 platforms pinctrl: freescale: Enable driver if platform is enabled. pinctrl: freescale: Depend imx-scu driver on OF pinctrl: armada-37xx: propagate error from armada_37xx_pmx_set_by_name() pinctrl: armada-37xx: propagate error from armada_37xx_gpio_get_direction() pinctrl: armada-37xx: propagate error from armada_37xx_pmx_gpio_set_direction() pinctrl: armada-37xx: propagate error from armada_37xx_gpio_get() pinctrl: armada-37xx: propagate error from armada_37xx_gpio_direction_output() pinctrl: armada-37xx: set GPIO output value before setting direction pinctrl: armada-37xx: use correct OUTPUT_VAL register for GPIOs > 31 pinctrl: meson: Drop unused aml_pctl_find_group_by_name() pinctrl: at91: Fix possible out-of-boundary access pinctrl: add stubs for OF-specific pinconf functions pinctrl: qcom: correct the ngpios entry for QCS8300 pinctrl: qcom: correct the ngpios entry for QCS615 dt-bindings: pinctrl: qcom: correct gpio-ranges in examples for qcs8300 dt-bindings: pinctrl: qcom: correct gpio-ranges in examples for qcs615 ...
2025-05-27Merge tag 'irq-cleanups-2025-05-25' of ↵Linus Torvalds1-3/+2
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq cleanups from Thomas Gleixner: "A set of cleanups for the generic interrupt subsystem: - Consolidate on one set of functions for the interrupt domain code to get rid of pointlessly duplicated code with only marginal different semantics. - Update the documentation accordingly and consolidate the coding style of the irqdomain header" * tag 'irq-cleanups-2025-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (46 commits) irqdomain: Consolidate coding style irqdomain: Fix kernel-doc and add it to Documentation Documentation: irqdomain: Update it Documentation: irq-domain.rst: Simple improvements Documentation: irq/concepts: Minor improvements Documentation: irq/concepts: Add commas and reflow irqdomain: Improve kernel-docs of functions irqdomain: Make struct irq_domain_info variables const irqdomain: Use irq_domain_instantiate()'s return value as initializers irqdomain: Drop irq_linear_revmap() pinctrl: keembay: Switch to irq_find_mapping() irqchip/armada-370-xp: Switch to irq_find_mapping() gpu: ipu-v3: Switch to irq_find_mapping() gpio: idt3243x: Switch to irq_find_mapping() sh: Switch to irq_find_mapping() powerpc: Switch to irq_find_mapping() irqdomain: Drop irq_domain_add_*() functions powerpc: Switch irq_domain_add_nomap() to use fwnode thermal: Switch to irq_domain_create_linear() soc: Switch to irq_domain_create_*() ...
2025-05-21pinctrl: mediatek: eint: Fix invalid pointer dereference for v1 platformsNícolas F. R. A. Prado4-19/+16
Commit 3ef9f710efcb ("pinctrl: mediatek: Add EINT support for multiple addresses") introduced an access to the 'soc' field of struct mtk_pinctrl in mtk_eint_do_init() and for that an include of pinctrl-mtk-common-v2.h. However, pinctrl drivers relying on the v1 common driver include pinctrl-mtk-common.h instead, which provides another definition of struct mtk_pinctrl that does not contain an 'soc' field. Since mtk_eint_do_init() can be called both by v1 and v2 drivers, it will now try to dereference an invalid pointer when called on v1 platforms. This has been observed on Genio 350 EVK (MT8365), which crashes very early in boot (the kernel trace can only be seen with earlycon). In order to fix this, since 'struct mtk_pinctrl' was only needed to get a 'struct mtk_eint_pin', make 'struct mtk_eint_pin' a parameter of mtk_eint_do_init() so that callers need to supply it, removing mtk_eint_do_init()'s dependency on any particular 'struct mtk_pinctrl'. Fixes: 3ef9f710efcb ("pinctrl: mediatek: Add EINT support for multiple addresses") Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/20250520-genio-350-eint-null-ptr-deref-fix-v2-1-6a3ca966a7ba@collabora.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-05-16pinctrl: Switch to irq_domain_create_*()Jiri Slaby (SUSE)1-3/+2
irq_domain_add_*() interfaces are going away as being obsolete now. Switch to the preferred irq_domain_create_*() ones. Those differ in the node parameter: They take more generic struct fwnode_handle instead of struct device_node. Therefore, of_fwnode_handle() is added around the original parameter. Note some of the users can likely use dev->fwnode directly instead of indirect of_fwnode_handle(dev->of_node). But dev->fwnode is not guaranteed to be set for all, so this has to be investigated on case to case basis (by people who can actually test with the HW). [ tglx: Fix up subject prefix ] Signed-off-by: Jiri Slaby (SUSE) <jirislaby@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/all/20250319092951.37667-31-jirislaby@kernel.org
2025-05-09pinctrl: mediatek: common: use new GPIO line value setter callbacksBartosz Golaszewski1-4/+9
struct gpio_chip now has callbacks for setting line values that return an integer, allowing to indicate failures. Convert the driver to using them. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/20250425-gpiochip-set-rv-pinctrl-mediatek-v1-5-93e6a01855e7@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-05-09pinctrl: mediatek: moore: use new GPIO line value setter callbacksBartosz Golaszewski1-8/+10
struct gpio_chip now has callbacks for setting line values that return an integer, allowing to indicate failures. Convert the driver to using them. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/20250425-gpiochip-set-rv-pinctrl-mediatek-v1-4-93e6a01855e7@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-05-09pinctrl: mediatek: paris: use new GPIO line value setter callbacksBartosz Golaszewski1-4/+8
struct gpio_chip now has callbacks for setting line values that return an integer, allowing to indicate failures. Convert the driver to using them. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/20250425-gpiochip-set-rv-pinctrl-mediatek-v1-3-93e6a01855e7@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-05-09pinctrl: mediatek: paris: don't double-check the GPIO numberBartosz Golaszewski1-19/+0
GPIO core already makes sure we don't pass invalid GPIO numbers down to the driver callbacks. Remove needless checks from the driver. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/20250425-gpiochip-set-rv-pinctrl-mediatek-v1-2-93e6a01855e7@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-05-09pinctrl: mediatek: airoha: use new GPIO line value setter callbacksBartosz Golaszewski1-11/+8
struct gpio_chip now has callbacks for setting line values that return an integer, allowing to indicate failures. Convert the driver to using them. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Acked-by: Lorenzo Bianconi <lorenzo@kernel.org> Link: https://lore.kernel.org/20250425-gpiochip-set-rv-pinctrl-mediatek-v1-1-93e6a01855e7@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-04-23pinctrl: mediatek: common-v1: Fix error checking in mtk_eint_init()Dan Carpenter1-3/+3
The devm_kzalloc() function doesn't return error pointers, it returns NULL on error. Then on the next line it checks the same pointer again by mistake, "->base" instead of "->base[0]". Fixes: fe412e3a6c97 ("pinctrl: mediatek: common-v1: Fix EINT breakage on older controllers") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Link: https://lore.kernel.org/aAijc10fHka1WAMX@stanley.mountain Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-04-23pinctrl: mediatek: Fix new design debounce issueHao Chang1-1/+1
Calculate the true offset of eint according to index. Fixes: 3ef9f710efcb ("pinctrl: mediatek: Add EINT support for multiple addresses") Signed-off-by: Hao Chang <ot_chhao.chang@mediatek.com> Signed-off-by: Qingliang Li <qingliang.li@mediatek.com> Link: https://lore.kernel.org/20250422075216.14073-1-ot_chhao.chang@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-04-23pinctrl: mediatek: pinctrl: mediatek: add mt8196 eint pinHao Chang2-0/+297
Add eint pin support for MediaTek mt8196 SoC. Signed-off-by: Hao Chang <ot_chhao.chang@mediatek.com> Signed-off-by: Qingliang Li <qingliang.li@mediatek.com> Acked-by: Cathy Xu (许华婷) <ot_cathy.xu@mediatek.com> Link: https://lore.kernel.org/20250411084159.3307-1-ot_chhao.chang@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-04-17pinctrl: mediatek: common-v1: Fix EINT breakage on older controllersChen-Yu Tsai1-1/+7
When EINT support for multiple addresses was introduced, the driver library for the older generations (pinctrl-mtk-common) was not fixed together. This resulted in invalid pointer accesses. Fix up the filled in |struct mtk_eint| in pinctrl-mtk-common to match what is now expected by the mtk-eint library. Reported-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Tested-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Closes: https://lore.kernel.org/all/43nd5jxpk7b7fv46frqlfjnqfh5jlpqsemeoakqzd4wdi3df6y@w7ycd3k5ezvn/ Fixes: 3ef9f710efcb ("pinctrl: mediatek: Add EINT support for multiple addresses") Cc: Hao Chang <ot_chhao.chang@mediatek.com> Cc: Qingliang Li <qingliang.li@mediatek.com> Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/20250415112339.2385454-1-wenst@chromium.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-04-17pinctrl: mediatek: Add pinctrl driver on mt8196Guodong Liu4-0/+4661
Add pinctrl driver support for MediaTek Soc mt8196. Signed-off-by: Guodong Liu <guodong.liu@mediatek.com> Signed-off-by: Cathy Xu <ot_cathy.xu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/20250414090215.16091-4-ot_cathy.xu@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-04-17pinctrl: mediatek: Add pinctrl driver for MT6893 Dimensity 1200AngeloGioacchino Del Regno4-0/+3173
Add support for the MediaTek Dimensity 1200 (MT6893) SoC's GPIO/pinmux controller. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/20250410144044.476060-3-angelogioacchino.delregno@collabora.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-04-15pinctrl: airoha: fix wrong PHY LED mapping and PHY2 LED definesChristian Marangi1-89/+70
The current PHY2 LED define are wrong and actually set BITs outside the related mask. Fix it and set the correct value. While at it, also use FIELD_PREP_CONST macro to make it simple to understand what values are actually applied for the mask. Also fix wrong PHY LED mapping. The SoC Switch supports up to 4 port but the register define mapping for 5 PHY port, starting from 0. The mapping was wrongly defined starting from PHY1. Reorder the function group to start from PHY0. PHY4 is actually never supported as we don't have a GPIO pin to assign. Cc: stable@vger.kernel.org Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC") Reviewed-by: Benjamin Larsson <benjamin.larsson@genexis.eu> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Acked-by: Lorenzo Bianconi <lorenzo@kernel.org> Link: https://lore.kernel.org/20250401135026.18018-1-ansuelsmth@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-04-15pinctrl: mediatek: Fix the invalid conditionsHao Chang3-5/+8
The variable count_reg_names is defined as an int type and cannot be directly compared to an unsigned int. To resolve this issue, first verify the correctness of count_reg_names. Link: https://lore.kernel.org/all/5ae93d42e4c4e70fb33bf35dcc37caebf324c8d3.camel@mediatek.com/T/ Signed-off-by: Hao Chang <ot_chhao.chang@mediatek.com> Signed-off-by: Qingliang Li <qingliang.li@mediatek.com> Link: https://lore.kernel.org/20250329024533.5279-1-ot_chhao.chang@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-03-24pinctrl: mediatek: Add EINT support for multiple addressesHao Chang5-127/+254
For flexible routing, eint will be divided into 5 bases, and it will obtain the operation address through the pins array. Signed-off-by: Hao Chang <ot_chhao.chang@mediatek.com> Signed-off-by: Qingliang Li <qingliang.li@mediatek.com> Link: https://lore.kernel.org/20250322035307.4811-2-ot_chhao.chang@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-01-08pinctrl: mediatek: Drop mtk_pinconf_bias_set_pd()Linus Walleij1-18/+0
This function is unused and causing compile errors, delete it. Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Link: https://lore.kernel.org/linux-next/20250106164630.4447cd0d@canb.auug.org.au/ Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-12-27pinctrl: mediatek: add MT7988 pinctrl driverDaniel Golle3-0/+1564
Add pinctrl driver for the MediaTek MT7988 SoC. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Daniel Golle <daniel@makrotopia.org> [correctly initialise for the function_desc structure] Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/20241217085435.9586-3-linux@fw-web.de Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-12-27pinctrl: mediatek: add support for MTK_PULL_PD_TYPEDaniel Golle2-11/+63
The MediaTek MT7988 SoC got some pins which only got configurable pull-down but unlike previous designs there is no pull-up option. Add new type MTK_PULL_PD_TYPE to support configuring such pins. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/20241217085435.9586-2-linux@fw-web.de Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-11-18pinctrl: airoha: Use unsigned long for bit searchKees Cook1-4/+5
Instead of risking alignment problems and causing (false positive) array bound warnings when casting a u32 to (64-bit) unsigned long, just use a native unsigned long for doing bit searches. Avoids warning with GCC 15's -Warray-bounds -fdiagnostics-details: In file included from ../include/linux/bitmap.h:11, from ../include/linux/cpumask.h:12, from ../arch/x86/include/asm/paravirt.h:21, from ../arch/x86/include/asm/irqflags.h:80, from ../include/linux/irqflags.h:18, from ../include/linux/spinlock.h:59, from ../include/linux/irq.h:14, from ../include/linux/irqchip/chained_irq.h:10, from ../include/linux/gpio/driver.h:8, from ../drivers/pinctrl/mediatek/pinctrl-airoha.c:11: In function 'find_next_bit', inlined from 'airoha_irq_handler' at ../drivers/pinctrl/mediatek/pinctrl-airoha.c:2394:3: ../include/linux/find.h:65:23: error: array subscript 'long unsigned int[0]' is partly outside array bounds of 'u32[1]' {aka 'unsigned int[1]'} [-Werror=array-bounds=] 65 | val = *addr & GENMASK(size - 1, offset); | ^~~~~ ../drivers/pinctrl/mediatek/pinctrl-airoha.c: In function 'airoha_irq_handler': ../drivers/pinctrl/mediatek/pinctrl-airoha.c:2387:21: note: object 'status' of size 4 2387 | u32 status; | ^~~~~~ Signed-off-by: Kees Cook <kees@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/20241117114534.work.292-kees@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-30pinctrl: airoha: Add support for EN7581 SoCLorenzo Bianconi3-1/+2987
Introduce pinctrl driver for EN7581 SoC. Current EN7581 pinctrl driver supports the following functionalities: - pin multiplexing - pin pull-up, pull-down, open-drain, current strength, {input,output}_enable, output_{low,high} - gpio controller - irq controller Tested-by: Benjamin Larsson <benjamin.larsson@genexis.eu> Co-developed-by: Benjamin Larsson <benjamin.larsson@genexis.eu> Signed-off-by: Benjamin Larsson <benjamin.larsson@genexis.eu> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Link: https://lore.kernel.org/20241023-en7581-pinctrl-v9-5-afb0cbcab0ec@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-09-23Merge tag 'pinctrl-v6.12-1' of ↵Linus Torvalds1-5/+2
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "Core changes: - Add support for "input-schmitt-microvolt" property, as used in the Sophgo SoC New drivers: - Mobileye EyeQ5 pin controller, I think this is an automotive SoC - Rockchip rk3576 pin control support - Sophgo CV1800 series pin controllers: CV1800B, CV1812H and SG2000 Improvements: - Gradual improvements to Renesas, Samsung, Qualcomm, Nuvoton and a few other drivers" * tag 'pinctrl-v6.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (67 commits) pinctrl: intel: Constify struct intel_pinctrl parameter pinctrl: Remove redundant null pointer checks in pinctrl_remove_device_debugfs() pinctrl: baytrail: Drop duplicate return statement pinctrl: intel: Inline intel_gpio_community_irq_handler() dt-bindings: pinctrl: qcom: add missing type to GPIO hogs pinctrl: madera: Simplify with dev_err_probe() pinctrl: k210: Use devm_clk_get_enabled() helpers pinctrl: Join split messages and remove double whitespace pinctrl: renesas: rzg2l: Move pinconf_to_config_argument() call outside of switch cases pinctrl: renesas: rzg2l: Introduce single macro for digital noise filter configuration pinctrl: renesas: rzg2l: Replace of_node_to_fwnode() with more suitable API pinctrl: mvebu: Fix devinit_dove_pinctrl_probe function pinctrl: sunxi: Use devm_clk_get_enabled() helpers pinctrl: sophgo: cv18xx: fix missed __iomem type identifier pinctrl: stmfx: Use string_choices API instead of ternary operator pinctrl: nomadik: Use kmemdup_array instead of kmemdup for multiple allocation pinctrl: intel: Introduce for_each_intel_gpio_group() helper et al. pinctrl: intel: Constify intel_get_community() returned object pinctrl: intel: Implement high impedance support pinctrl: intel: Add __intel_gpio_get_direction() helper ...
2024-08-23pinctrl: mediatek: common-v2: Fix broken bias-disable for PULL_PU_PD_RSEL_TYPENícolas F. R. A. Prado1-26/+29
Despite its name, commit fed74d75277d ("pinctrl: mediatek: common-v2: Fix bias-disable for PULL_PU_PD_RSEL_TYPE") actually broke bias-disable for PULL_PU_PD_RSEL_TYPE. mtk_pinconf_bias_set_combo() tries every bias method supported by the pin until one succeeds. For PULL_PU_PD_RSEL_TYPE pins, before the breaking commit, mtk_pinconf_bias_set_rsel() would be called first to try and set the RSEL value (as well as PU and PD), and if that failed, the only other valid option was that bias-disable was specified, which would then be handled by calling mtk_pinconf_bias_set_pu_pd() and disabling both PU and PD. The breaking commit misunderstood this logic and added an early "return 0" in mtk_pinconf_bias_set_rsel(). The result was that in the bias-disable case, the bias was left unchanged, since by returning success, mtk_pinconf_bias_set_combo() no longer tried calling mtk_pinconf_bias_set_pu_pd() to disable the bias. Since the logic for configuring bias-disable on PULL_PU_PD_RSEL_TYPE pins required mtk_pinconf_bias_set_rsel() to fail first, in that case, an error was printed to the log, eg: mt8195-pinctrl 10005000.pinctrl: Not support rsel value 0 Ohm for pin = 29 (GPIO29) This is what the breaking commit actually got rid of, and likely part of the reason why that commit was thought to be fixing functionality, while in reality it was breaking it. Instead of simply reverting that commit, restore the functionality but in a way that avoids the error from being printed and makes the code less confusing: * Return 0 explicitly if a bias method was successful * Introduce an extra function mtk_pinconf_bias_set_pu_pd_rsel() that calls both mtk_pinconf_bias_set_rsel() (only if needed) and mtk_pinconf_bias_set_pu_pd() * And analogously for the corresponding getters Fixes: fed74d75277d ("pinctrl: mediatek: common-v2: Fix bias-disable for PULL_PU_PD_RSEL_TYPE") Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/20240808-mtk-rsel-bias-disable-fix-v1-1-1b4e85bf596c@collabora.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-08-23pinctrl: mediatek: Use of_property_read_bool()Rob Herring (Arm)1-5/+2
Use of_property_read_bool() to read boolean properties rather than of_find_property(). This is part of a larger effort to remove callers of of_find_property() and similar functions. of_find_property() leaks the DT struct property and data pointers which is a problem for dynamically allocated nodes which may be freed. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/20240731191312.1710417-23-robh@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-26pinctrl: mediatek: Use scope based of_node_put() cleanupsPeng Fan2-6/+2
Use scope based of_node_put() cleanup to simplify code. Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/20240504-pinctrl-cleanup-v2-14-26c5f2dc1181@nxp.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: mediatek: moore: Convert to use func memberAndy Shevchenko2-8/+6
Convert drivers to use func member embedded in struct function_desc, because other members will be removed to avoid duplication and desynchronisation of the generic pin function description. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20240530085745.1539925-11-andy.shevchenko@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: mediatek: moore: Provide a helper macro PINCTRL_PIN_FUNCTION()Andy Shevchenko6-76/+84
Provide a helper macro to assign the struct function_desc entries. This helps further refactoring. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20240530085745.1539925-5-andy.shevchenko@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-06-17pinctrl: ralink: mt76x8: fix pinmux functionWeihao Li1-61/+27
The current version of the pinctrl driver has some issues: 1. Duplicated "gpio" pmx function The common code will add a "gpio" pmx functon to every pin group, so it's not necessary to define a separate "gpio" pmx function in pin groups. 2. Duplicated pmx function name There are some same function name in different pin groups, which will cause some problems. For example, when we want to use PAD_GPIO0 as refclk output function, the common clk framework code will search the entire pin function lists, then return the first one matched, in this case the matched function list only include the PAD_CO_CLKO pin group because there are three "refclk" pin function, which is added by refclk_grp, spi_cs1_grp and gpio_grp. To solve this problem, a simple way is just add a pingrp refix to function name like mt7620 pinctrl driver does. 3. Useless "-" or "rsvd" functon It's really unnecessary to add a reserved pin mux function to the function lists, because we never use it. Signed-off-by: Weihao Li <cn.liweihao@gmail.com> Link: https://lore.kernel.org/r/20240527022036.31985-1-user@blabla Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-05-20Merge tag 'pinctrl-v6.10-1' of ↵Linus Torvalds2-0/+2
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "Core changes: - Use DEFINE_SHOW_STORE_ATTRIBUTE() in debugfs entries New drivers: - Qualcomm PMIH0108, PMD8028, PMXR2230 and PM6450 pin control support Improvements: - Serious cleanup of the recently merged aw9523 driver - Fix PIN_CONFIG_BIAS_DISABLE handling in pinctrl-single - A slew of device tree binding cleanups - Support a bus clock in the Samsung driver" * tag 'pinctrl-v6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (48 commits) pinctrl: bcm2835: Make pin freeing behavior configurable dt-bindings: pinctrl: qcom,pmic-gpio: Fix "comptaible" typo for PMIH0108 pinctrl: qcom: pinctrl-sm7150: Fix sdc1 and ufs special pins regs dt-bindings: pinctrl: mediatek: mt7622: add "antsel" function dt-bindings: pinctrl: mediatek: mt7622: fix array properties pinctrl: samsung: drop redundant drvdata assignment pinctrl: samsung: support a bus clock dt-bindings: pinctrl: samsung: google,gs101-pinctrl needs a clock pinctrl: renesas: rzg2l: Limit 2.5V power supply to Ethernet interfaces pinctrl: renesas: r8a779h0: Add INTC-EX pins, groups, and function pinctrl: renesas: r8a779h0: Fix IRQ suffixes pinctrl: renesas: rzg2l: Remove extra space in function parameter dt-bindings: pinctrl: qcom,pmic-mpp: add support for PM8901 pinctrl: pinconf-generic: print hex value pinctrl: realtek: fix module autoloading pinctrl: qcom: sm7150: fix module autoloading pinctrl: loongson2: fix module autoloading pinctrl: mediatek: fix module autoloading pinctrl: freescale: imx8ulp: fix module autoloading dt-bindings: pinctrl: qcom,pmic-gpio: Allow gpio-hog nodes ...
2024-04-17pinctrl: mediatek: fix module autoloadingKrzysztof Kozlowski2-0/+2
Add MODULE_DEVICE_TABLE(), so the module could be properly autoloaded based on the alias from of_device_id table. Pin controllers are considered core components, so usually they are built-in, however these can be built and used as modules on some generic kernel. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Message-ID: <20240411064614.7409-2-krzk@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-04pinctrl: mediatek: paris: Rework support for PIN_CONFIG_{INPUT,OUTPUT}_ENABLEChen-Yu Tsai1-27/+11
There is a misinterpretation of some of the PIN_CONFIG_* options in this driver library. PIN_CONFIG_OUTPUT_ENABLE should refer to a buffer or switch in the output direction of the electrical path. The MediaTek hardware does not have such a thing. The driver incorrectly maps this option to the GPIO function's direction. Likewise, PIN_CONFIG_INPUT_ENABLE should refer to a buffer or switch in the input direction. The hardware does have such a mechanism, and is mapped to the IES bit. The driver however sets the direction in addition to the IES bit, which is incorrect. On readback, the IES bit isn't even considered. Ironically, the driver does not support readback for PIN_CONFIG_OUTPUT, while its readback of PIN_CONFIG_{INPUT,OUTPUT}_ENABLE is what it should be doing for PIN_CONFIG_OUTPUT. Rework support for these three options, so that PIN_CONFIG_OUTPUT_ENABLE is completely removed, PIN_CONFIG_INPUT_ENABLE is only linked to the IES bit, and PIN_CONFIG_OUTPUT is linked to the GPIO function's direction and output level. Fixes: 805250982bb5 ("pinctrl: mediatek: add pinctrl-paris that implements the vendor dt-bindings") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Message-ID: <20240327091336.3434141-3-wenst@chromium.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-04-04pinctrl: mediatek: paris: Fix PIN_CONFIG_INPUT_SCHMITT_ENABLE readbackChen-Yu Tsai1-0/+2
In the generic pin config library, readback of some options are handled differently compared to the setting of those options: the argument value is used to convey enable/disable of an option in the set path, but success or -EINVAL is used to convey if an option is enabled or disabled in the debugfs readback path. PIN_CONFIG_INPUT_SCHMITT_ENABLE is one such option. Fix the readback of the option in the mediatek-paris library, so that the debugfs dump is not showing "input schmitt enabled" for pins that don't have it enabled. Fixes: 1bea6afbc842 ("pinctrl: mediatek: Refine mtk_pinconf_get()") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Message-ID: <20240327091336.3434141-2-wenst@chromium.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>