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AgeCommit message (Expand)AuthorFilesLines
2025-05-13genirq: Consistently use '%u' format specifier for unsigned int variablesAndy Shevchenko2-3/+3
2025-05-13genirq: Ensure flags in lock guard is consistently initializedNathan Chancellor1-4/+4
2025-05-09genirq: Fix inverted condition in handle_nested_irq()Thomas Gleixner1-1/+1
2025-05-08genirq/cpuhotplug: Fix up lock guards conversion brainf..tThomas Gleixner1-1/+1
2025-05-07genirq: Use scoped_guard() to shut clang upThomas Gleixner1-2/+2
2025-05-07genirq: Remove unused remove_percpu_irq()Dr. David Alan Gilbert1-15/+0
2025-05-07genirq: Remove irq_[get|put]_desc*()Thomas Gleixner1-24/+0
2025-05-07genirq/manage: Rework irq_set_irqchip_state()Thomas Gleixner1-28/+15
2025-05-07genirq/manage: Rework irq_get_irqchip_state()Thomas Gleixner1-16/+6
2025-05-07genirq/manage: Rework teardown_percpu_nmi()Thomas Gleixner1-14/+5
2025-05-07genirq/manage: Rework prepare_percpu_nmi()Thomas Gleixner1-21/+8
2025-05-07genirq/manage: Rework disable_percpu_irq()Thomas Gleixner1-9/+2
2025-05-07genirq/manage: Rework irq_percpu_is_enabled()Thomas Gleixner1-13/+3
2025-05-07genirq/manage: Rework enable_percpu_irq()Thomas Gleixner1-26/+16
2025-05-07genirq/manage: Rework irq_set_parent()Thomas Gleixner1-10/+5
2025-05-07genirq/manage: Rework can_request_irq()Thomas Gleixner1-13/+8
2025-05-07genirq/manage: Rework irq_set_irq_wake()Thomas Gleixner1-35/+30
2025-05-07genirq/manage: Rework enable_irq()Thomas Gleixner1-11/+6
2025-05-07genirq/manage: Rework __disable_irq_nosync()Thomas Gleixner1-8/+5
2025-05-07genirq/manage: Rework irq_set_vcpu_affinity()Thomas Gleixner1-23/+16
2025-05-07genirq/manage: Rework __irq_apply_affinity_hint()Thomas Gleixner1-12/+10
2025-05-07genirq/manage: Rework irq_update_affinity_desc()Thomas Gleixner1-40/+28
2025-05-07genirq/manage: Convert to lock guardsThomas Gleixner1-97/+58
2025-05-07genirq/manage: Cleanup kernel doc commentsThomas Gleixner1-289/+271
2025-05-07genirq/chip: Rework irq_modify_status()Thomas Gleixner1-27/+23
2025-05-07genirq/chip: Rework irq_set_handler() variantsThomas Gleixner1-23/+11
2025-05-07genirq/chip: Rework irq_set_chip_data()Thomas Gleixner1-12/+9
2025-05-07genirq/chip: Rework irq_set_msi_desc_off()Thomas Gleixner1-21/+17
2025-05-07genirq/chip: Rework irq_set_handler_data()Thomas Gleixner1-12/+9
2025-05-07genirq/chip: Rework irq_set_irq_type()Thomas Gleixner1-13/+6
2025-05-07genirq/chip: Rework irq_set_chip()Thomas Gleixner1-16/+12
2025-05-07genirq/chip: Use lock guards where applicableThomas Gleixner1-16/+8
2025-05-07genirq/chip: Rework handle_fasteoi_mask_irq()Thomas Gleixner1-29/+9
2025-05-07genirq/chip: Rework handle_fasteoi_ack_irq()Thomas Gleixner1-26/+13
2025-05-07genirq/chip: Rework handle_edge_irq()Thomas Gleixner1-33/+16
2025-05-07genirq/chip: Rework handle_eoi_irq()Thomas Gleixner1-24/+18
2025-05-07genirq/chip: Rework handle_level_irq()Thomas Gleixner1-23/+9
2025-05-07genirq/chip: Rework handle_untracked_irq()Thomas Gleixner1-27/+16
2025-05-07genirq/chip: Rework handle_simple_irq()Thomas Gleixner1-20/+10
2025-05-07genirq/chip: Rework handle_nested_irq()Thomas Gleixner1-42/+36
2025-05-07genirq/chip: Prepare for code reductionThomas Gleixner1-8/+27
2025-05-07genirq/debugfs: Convert to lock guardsThomas Gleixner1-2/+1
2025-05-07genirq/cpuhotplug: Convert to lock guardsThomas Gleixner1-6/+4
2025-05-07genirq/spurious: Switch to lock guardsThomas Gleixner1-18/+12
2025-05-07genirq/spurious: Cleanup codeThomas Gleixner1-46/+28
2025-05-07genirq/proc: Switch to lock guardsThomas Gleixner1-41/+24
2025-05-07genirq/resend: Switch to lock guardsThomas Gleixner1-29/+21
2025-05-07genirq/pm: Switch to lock guardsThomas Gleixner1-25/+13
2025-05-07genirq/autoprobe: Switch to lock guardsThomas Gleixner1-17/+9
2025-05-07genirq/irqdesc: Switch to lock guardsThomas Gleixner1-85/+44