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2022-12-01tools/testing/cxl: Add "Set Passphrase" opcode supportDave Jiang-0/+88
2022-12-01tools/testing/cxl: Add "Get Security State" opcode supportDave Jiang-7/+37
2022-11-30cxl/pmem: Introduce nvdimm_security_ops with ->get_flags() operationDave Jiang-0/+1
2022-11-14tools/testing/cxl: Add bridge mocking supportDan Williams-2/+8
2022-11-14cxl: Unify debug messages when calling devm_cxl_add_dport()Robert Richter-8/+1
2022-11-04tools/testing/cxl: Add a single-port host-bridge regression configDan Williams-19/+278
2022-11-04tools/testing/cxl: Fix some error exitsDan Williams-2/+2
2022-07-25cxl/hdm: Commit decoder state to hardwareDan Williams-0/+46
2022-07-21cxl/region: Add region creation supportBen Widawsky-0/+1
2022-07-21cxl/core: Define a 'struct cxl_endpoint_decoder'Dan Williams-3/+7
2022-07-21cxl/core: Define a 'struct cxl_switch_decoder'Dan Williams-7/+16
2022-07-10tools/testing/cxl: Fix decoder default stateDan Williams-1/+0
2022-07-10tools/testing/cxl: Add partition supportDan Williams-63/+28
2022-07-10tools/testing/cxl: Expand CFMWS windowsDan Williams-5/+5
2022-07-10tools/testing/cxl: Move cxl_test resources to the top of memoryDan Williams-1/+2
2022-07-09cxl/mem: Convert partition-info to resourcesDan Williams-1/+1
2022-07-09cxl/core: Rename ->decoder_range ->hpa_rangeDan Williams-1/+1
2022-06-28tools/testing/cxl: Fix cxl_hdm_decode_init() calling conventionDan Williams-3/+5
2022-05-19cxl/port: Reuse 'struct cxl_hdm' context for hdm initDan Williams-2/+3
2022-05-19cxl/pci: Drop @info argument to cxl_hdm_decode_init()Dan Williams-6/+3
2022-05-19cxl/mem: Merge cxl_dvsec_ranges() and cxl_hdm_decode_init()Dan Williams-16/+5
2022-05-19cxl/mem: Consolidate CXL DVSEC Range enumeration in the coreDan Williams-10/+17
2022-05-19cxl/pci: Move cxl_await_media_ready() to the coreDan Williams-7/+16
2022-04-12cxl/mem: Rename cxl_dvsec_decode_init() to cxl_hdm_decode_init()Dan Williams-1/+1
2022-02-08tools/testing/cxl: Add a physical_node linkDan Williams-2/+19
2022-02-08tools/testing/cxl: Enumerate mock decodersDan Williams-20/+98
2022-02-08tools/testing/cxl: Mock one level of switchesDan Williams-41/+97
2022-02-08tools/testing/cxl: Fix root port to host bridge assignmentDan Williams-1/+1
2022-02-08tools/testing/cxl: Mock dvsec_ranges()Dan Williams-0/+10
2022-02-08cxl/mem: Add the cxl_mem driverBen Widawsky-0/+16
2022-02-08cxl/memdev: Add numa_node attributeDan Williams-0/+1
2022-02-08cxl/pci: Emit device serial numberDan Williams-0/+1
2022-02-08cxl/pci: Implement wait for media activeBen Widawsky-0/+8
2022-02-08cxl/core/port: Remove @host argument for dport + decoder enumerationDan Williams-30/+21
2022-02-08cxl/port: Add a driver for 'struct cxl_port' objectsBen Widawsky-2/+5
2022-02-08cxl/core/hdm: Add CXL standard decoder enumeration to the coreDan Williams-0/+86
2022-02-08cxl/core: Generalize dport enumeration in the coreDan Williams-128/+71
2022-02-08cxl/port: Up-level cxl_add_dport() locking requirements to the callerDan Williams-0/+4
2022-02-08cxl/pmem: Introduce a find_cxl_root() helperDan Williams-26/+0
2022-02-08cxl/core/port: Rename bus.c to port.cDan Williams-1/+1
2021-11-15cxl/test: Mock acpi_table_parse_cedt()Dan Williams-48/+59
2021-11-15tools/testing/cxl: add mock output for the GET_HEALTH_INFO commandVishal Verma-0/+49
2021-11-15cxl/memdev: Change cxl_mem to a more descriptive nameIra Weiny-25/+25
2021-09-21tools/testing/cxl: Introduce a mock memory device + driverDan Williams-1/+354
2021-09-21tools/testing/cxl: Introduce a mocked-up CXL port hierarchyDan Williams-0/+871
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