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2025-09-23KVM: selftests: Add an MSR test to exercise guest/host and read/writeSean Christopherson1-0/+5
Add a selftest to verify reads and writes to various MSRs, from both the guest and host, and expect success/failure based on whether or not the vCPU supports the MSR according to supported CPUID. Note, this test is extremely similar to KVM-Unit-Test's "msr" test, but provides more coverage with respect to host accesses, and will be extended to provide addition testing of CPUID-based features, save/restore lists, and KVM_{G,S}ET_ONE_REG, all which are extremely difficult to validate in KUT. If kvm.ignore_msrs=true, skip the unsupported and reserved testcases as KVM's ABI is a mess; what exactly is supposed to be ignored, and when, varies wildly. Reviewed-by: Chao Gao <chao.gao@intel.com> Link: https://lore.kernel.org/r/20250919223258.1604852-46-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2025-09-23KVM: selftests: Add ex_str() to print human friendly name of exception vectorsSean Christopherson1-0/+2
Steal exception_mnemonic() from KVM-Unit-Tests as ex_str() (to keep line lengths reasonable) and use it in assert messages that currently print the raw vector number. Co-developed-by: Chao Gao <chao.gao@intel.com> Signed-off-by: Chao Gao <chao.gao@intel.com> Link: https://lore.kernel.org/r/20250919223258.1604852-45-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2025-09-23KVM: selftests: Handle Intel Atom errata that leads to PMU event overcountdongsheng1-0/+16
Add a PMU errata framework and use it to relax precise event counts on Atom platforms that overcount "Instruction Retired" and "Branch Instruction Retired" events, as the overcount issues on VM-Exit/VM-Entry are impossible to prevent from userspace, e.g. the test can't prevent host IRQs. Setup errata during early initialization and automatically sync the mask to VMs so that tests can check for errata without having to manually manage host=>guest variables. For Intel Atom CPUs, the PMU events "Instruction Retired" or "Branch Instruction Retired" may be overcounted for some certain instructions, like FAR CALL/JMP, RETF, IRET, VMENTRY/VMEXIT/VMPTRLD and complex SGX/SMX/CSTATE instructions/flows. The detailed information can be found in the errata (section SRF7): https://edc.intel.com/content/www/us/en/design/products-and-solutions/processors-and-chipsets/sierra-forest/xeon-6700-series-processor-with-e-cores-specification-update/errata-details/ For the Atom platforms before Sierra Forest (including Sierra Forest), Both 2 events "Instruction Retired" and "Branch Instruction Retired" would be overcounted on these certain instructions, but for Clearwater Forest only "Instruction Retired" event is overcounted on these instructions. Signed-off-by: dongsheng <dongsheng.x.zhang@intel.com> Co-developed-by: Dapeng Mi <dapeng1.mi@linux.intel.com> Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com> Tested-by: Yi Lai <yi1.lai@intel.com> Co-developed-by: Sean Christopherson <seanjc@google.com> Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com> Tested-by: Dapeng Mi <dapeng1.mi@linux.intel.com> Link: https://lore.kernel.org/r/20250919214648.1585683-6-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2025-09-23KVM: selftests: Validate more arch-events in pmu_counters_testDapeng Mi2-1/+16
Add support for 5 new architectural events (4 topdown level 1 metrics events and LBR inserts event) that will first show up in Intel's Clearwater Forest CPUs. Detailed info about the new events can be found in SDM section 21.2.7 "Pre-defined Architectural Performance Events". Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com> Tested-by: Yi Lai <yi1.lai@intel.com> [sean: drop "unavailable_mask" changes] Tested-by: Dapeng Mi <dapeng1.mi@linux.intel.com> Link: https://lore.kernel.org/r/20250919214648.1585683-5-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2025-09-11KVM: selftests: Add support for #DE exception fixupSean Christopherson1-0/+6
Add support for handling #DE (divide error) exceptions in KVM selftests so that the fastops test can verify KVM correctly handles #DE when emulating DIV or IDIV on behalf of the guest. Morph #DE to 0xff (i.e. to -1) as a mostly-arbitrary vector to indicate #DE, so that '0' (the real #DE vector) can still be used to indicate "no exception". Link: https://lore.kernel.org/r/20250909202835.333554-2-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2025-08-19KVM: selftests: Move Intel and AMD module param helpers to x86/processor.hSean Christopherson1-0/+20
Move the x86 specific helpers for getting kvm_{amd,intel} module params to x86 where they belong. Expose the module-agnostic helpers globally, there is nothing secret about the logic. Link: https://lore.kernel.org/r/20250806225159.1687326-1-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2025-06-20KVM: selftests: Verify KVM is loaded when getting a KVM module paramSean Christopherson1-1/+5
Probe /dev/kvm when getting a KVM module param so that attempting to load a module param super early in a selftest generates a SKIP message about KVM not being loaded/enabled, versus some random parameter not existing. E.g. KVM x86's unconditional retrieval of force_emulation_prefix during kvm_selftest_arch_init() generates a rather confusing error message that takes far too much triage to understand. Link: https://lore.kernel.org/r/20250516215909.2551628-2-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2025-05-02KVM: selftests: Add library support for interacting with SNPPratik R. Sampat1-1/+32
Extend the SEV library to include support for SNP ioctl() wrappers, which aid in launching and interacting with a SEV-SNP guest. Signed-off-by: Pratik R. Sampat <prsampat@amd.com> Link: https://lore.kernel.org/r/20250305230000.231025-8-prsampat@amd.com [sean: use BIT()] Signed-off-by: Sean Christopherson <seanjc@google.com>
2025-05-02KVM: selftests: Introduce SEV VM type checkPratik R. Sampat1-0/+15
In preparation for SNP, declutter the vm type check by introducing a SEV-SNP VM type check as well as a transitive set of helper functions. The SNP VM type is the subset of SEV-ES. Similarly, the SEV-ES and SNP types are subset of the SEV VM type check. Signed-off-by: Pratik R. Sampat <prsampat@amd.com> Link: https://lore.kernel.org/r/20250305230000.231025-7-prsampat@amd.com [sean: make the helpers static inlines] Signed-off-by: Sean Christopherson <seanjc@google.com>
2025-05-02KVM: selftests: Add vmgexit helperPratik R. Sampat1-0/+5
Abstract rep vmmcall coded into the vmgexit helper for the sev library. No functional change intended. Signed-off-by: Pratik R. Sampat <prsampat@amd.com> Reviewed-by: Pankaj Gupta <pankaj.gupta@amd.com> Link: https://lore.kernel.org/r/20250305230000.231025-4-prsampat@amd.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2025-05-02KVM: selftests: SEV-SNP test for KVM_SEV_INIT2Pratik R. Sampat1-0/+1
Add the X86_FEATURE_SEV_SNP CPU feature to the architectural definition for the SEV-SNP VM type to exercise the KVM_SEV_INIT2 call. Ensure that the SNP test is skipped in scenarios where CPUID supports it but KVM does not, preventing reporting of failure in such cases. Reviewed-by: Nikunj A Dadhania <nikunj@amd.com> Signed-off-by: Pratik R. Sampat <prsampat@amd.com> Link: https://lore.kernel.org/r/20250305230000.231025-3-prsampat@amd.com [sean: use the same pattern as SEV and SEV-ES] Signed-off-by: Sean Christopherson <seanjc@google.com>
2025-03-19Merge tag 'kvm-x86-selftests-6.15' of https://github.com/kvm-x86/linux into HEADPaolo Bonzini1-1/+2
KVM selftests changes for 6.15, part 2 - Fix a variety of flaws, bugs, and false failures/passes dirty_log_test, and improve its coverage by collecting all dirty entries on each iteration. - Fix a few minor bugs related to handling of stats FDs. - Add infrastructure to make vCPU and VM stats FDs available to tests by default (open the FDs during VM/vCPU creation). - Relax an assertion on the number of HLT exits in the xAPIC IPI test when running on a CPU that supports AMD's Idle HLT (which elides interception of HLT if a virtual IRQ is pending and unmasked). - Misc cleanups and fixes.
2025-03-19Merge tag 'kvm-x86-selftests_6.15-1' of https://github.com/kvm-x86/linux ↵Paolo Bonzini1-0/+47
into HEAD KVM selftests changes for 6.15, part 1 - Misc cleanups and prep work. - Annotate _no_printf() with "printf" so that pr_debug() statements are checked by the compiler for default builds (and pr_info() when QUIET). - Attempt to whack the last LLC references/misses mole in the Intel PMU counters test by adding a data load and doing CLFLUSH{OPT} on the data instead of the code being executed. The theory is that modern Intel CPUs have learned new code prefetching tricks that bypass the PMU counters. - Fix a flaw in the Intel PMU counters test where it asserts that an event is counting correctly without actually knowing what the event counts on the underlying hardware.
2025-02-28KVM: selftests: Relax assertion on HLT exits if CPU supports Idle HLTSean Christopherson1-0/+1
If the CPU supports Idle HLT, which elides HLT VM-Exits if the vCPU has an unmasked pending IRQ or NMI, relax the xAPIC IPI test's assertion on the number of HLT exits to only require that the number of exits is less than or equal to the number of HLT instructions that were executed. I.e. don't fail the test if Idle HLT does what it's supposed to do. Note, unfortunately there's no way to determine if *KVM* supports Idle HLT, as this_cpu_has() checks raw CPU support, and kvm_cpu_has() checks what can be exposed to L1, i.e. the latter would check if KVM supports nested Idle HLT. But, since the assert is purely bonus coverage, checking for CPU support is good enough. Cc: Manali Shukla <Manali.Shukla@amd.com> Tested-by: Manali Shukla <Manali.Shukla@amd.com> Link: https://lore.kernel.org/r/20250226231809.3183093-1-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2025-02-12KVM: selftests: Actually emit forced emulation prefix for kvm_asm_safe_fep()Sean Christopherson1-1/+1
Use KVM_ASM_SAFE_FEP, not simply KVM_ASM_SAFE, for kvm_asm_safe_fep(), as the non-FEP version doesn't force emulation (stating the obvious). Note, there are currently no users of kvm_asm_safe_fep(). Fixes: ab3b6a7de8df ("KVM: selftests: Add a forced emulation variation of KVM_ASM_SAFE()") Link: https://lore.kernel.org/r/20250130163135.270770-1-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2025-01-08KVM: selftests: Add helpers for locally (un)blocking IRQs on x86Sean Christopherson1-0/+40
Copy KVM-Unit-Tests' x86 helpers for emitting STI and CLI, comments and all, and use them throughout x86 selftests. The safe_halt() and sti_nop() logic in particular benefits from centralized comments, as the behavior isn't obvious unless the reader is already aware of the STI shadow. Cc: Manali Shukla <Manali.Shukla@amd.com> Link: https://lore.kernel.org/r/20241220012617.3513898-1-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2025-01-08KVM: selftests: Add defines for AMD PMU CPUID features and propertiesColton Lewis1-0/+7
Add macros for AMD's PMU related CPUID features. To make it easier to cross reference selftest code with KVM/kernel code, use the same macro names as the kernel for the features. For reference, the AMD APM defines the features/properties as: * PerfCtrExtCore (six core counters instead of four) * PerfCtrExtNB (four counters for northbridge events) * PerfCtrExtL2I (four counters for L2 cache events) * PerfMonV2 (support for registers to control multiple counters with a single register write) * LbrAndPmcFreeze (support for freezing last branch recorded stack on performance counter overflow) * NumPerfCtrCore (number of core counters) * NumPerfCtrNB (number of northbridge counters) Signed-off-by: Colton Lewis <coltonlewis@google.com> Link: https://lore.kernel.org/r/20240918205319.3517569-3-coltonlewis@google.com [sean: massage changelog, use same names as the kernel] Signed-off-by: Sean Christopherson <seanjc@google.com>
2024-12-18KVM: selftests: Add test case for MMIO during vectoring on x86Ivan Orlov1-0/+2
Extend the 'set_memory_region_test' with an x86-only test case which covers emulated MMIO during event vectoring error handling. The test case 1) Sets an IDT descriptor base to point to an MMIO address 2) Generates a #GP in the guest 3) Verifies userspace gets the correct exit reason, suberror code, and GPA in internal.data[3] Opportunistically add a definition for a non-canonical address to processor.h so that the source of the #GP is somewhat self-documenting, and so that future tests don't have to reinvent the wheel. Signed-off-by: Ivan Orlov <iorlov@amazon.com> Link: https://lore.kernel.org/r/20241217181458.68690-8-iorlov@amazon.com [sean: massage changelog] Signed-off-by: Sean Christopherson <seanjc@google.com>
2024-12-18KVM: selftests: Add and use a helper function for x86's LIDTIvan Orlov1-0/+5
Implement a function for setting the IDT descriptor from the guest code. Replace the existing lidt occurrences with calls to this function as `lidt` is used in multiple places. Signed-off-by: Ivan Orlov <iorlov@amazon.com> Link: https://lore.kernel.org/r/20241217181458.68690-7-iorlov@amazon.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2024-12-18KVM: selftests: Refresh vCPU CPUID cache in __vcpu_get_cpuid_entry()Sean Christopherson1-7/+9
Refresh selftests' CPUID cache in the vCPU structure when querying a CPUID entry so that tests don't consume stale data when KVM modifies CPUID as a side effect to a completely unrelated change. E.g. KVM adjusts OSXSAVE in response to CR4.OSXSAVE changes. Unnecessarily invoking KVM_GET_CPUID is suboptimal, but vcpu->cpuid exists to simplify selftests development, not for performance reasons. And, unfortunately, trying to handle the side effects in tests or other flows is unpleasant, e.g. selftests could manually refresh if KVM_SET_SREGS is successful, but that would still leave a gap with respect to guest CR4 changes. Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com> Link: https://lore.kernel.org/r/20241128013424.4096668-9-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2024-12-18KVM: selftests: Assert that vcpu->cpuid is non-NULL when getting CPUID entriesSean Christopherson1-0/+2
Add a sanity check in __vcpu_get_cpuid_entry() to provide a friendlier error than a segfault when a test developer tries to use a vCPU CPUID helper on a barebones vCPU. Link: https://lore.kernel.org/r/20241128013424.4096668-8-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2024-12-18KVM: selftests: Use canonical $(ARCH) paths for KVM selftests directoriesSean Christopherson12-0/+4387
Use the kernel's canonical $(ARCH) paths instead of the raw target triple for KVM selftests directories. KVM selftests are quite nearly the only place in the entire kernel that using the target triple for directories, tools/testing/selftests/drivers/s390x being the lone holdout. Using the kernel's preferred nomenclature eliminates the minor, but annoying, friction of having to translate to KVM's selftests directories, e.g. for pattern matching, opening files, running selftests, etc. Opportunsitically delete file comments that reference the full path of the file, as they are obviously prone to becoming stale, and serve no known purpose. Reviewed-by: Muhammad Usama Anjum <usama.anjum@collabora.com> Acked-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Acked-by: Andrew Jones <ajones@ventanamicro.com> Link: https://lore.kernel.org/r/20241128005547.4077116-16-seanjc@google.com Signed-off-by: Sean Christopherson <seanjc@google.com>