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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mailbox/aspeed,ast2700-mailbox.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ASPEED AST2700 mailbox controller
maintainers:
- Jammy Huang <jammy_huang@aspeedtech.com>
description: >
ASPEED AST2700 has multiple processors that need to communicate with each
other. The mailbox controller provides a way for these processors to send
messages to each other. It is a hardware-based inter-processor communication
mechanism that allows processors to send and receive messages through
dedicated channels.
The mailbox's tx/rx are independent, meaning that one processor can send a
message while another processor is receiving a message simultaneously.
There are 4 channels available for both tx and rx operations. Each channel
has a FIFO buffer that can hold messages of a fixed size (32 bytes in this
case).
The mailbox controller also supports interrupt generation, allowing
processors to notify each other when a message is available or when an event
occurs.
properties:
compatible:
const: aspeed,ast2700-mailbox
reg:
items:
- description: TX control register
- description: RX control register
reg-names:
items:
- const: tx
- const: rx
interrupts:
maxItems: 1
"#mbox-cells":
const: 1
required:
- compatible
- reg
- reg-names
- interrupts
- "#mbox-cells"
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
mailbox@12c1c200 {
compatible = "aspeed,ast2700-mailbox";
reg = <0x12c1c200 0x100>, <0x12c1c300 0x100>;
reg-names = "tx", "rx";
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <1>;
};
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