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#!/bin/bash

#
# export perf data to a postgresql database. Can cover
# perf ip samples (excluding the tracepoints). No special
# record requirements, just record what you want to export.
#
perf record $@
generated by cgit v1.2.3 (git 2.39.1) at 2026-01-10 13:57:49 +0000
mit/drivers/clk/clk-composite.c?id=c54ce354637058202621d55fec2ccba3fe62a219&follow=1'>clk: composite: Fix 'switching' to same clockAlexander Stein1-0/+1 2021-11-02clk: rockchip: drop module parts from rk3399 and rk3568 driversHeiko Stuebner3-10/+2 2021-11-02Revert "clk: rockchip: use module_platform_driver_probe"Heiko Stuebner2-2/+2 2021-11-02clk:mediatek: remove duplicate include in clk-mt8195-imp_iic_wrap.cRan Jianping1-2/+0 2021-11-02dt-bindings: clock: fu740-prci: add reset-cellsKrzysztof Kozlowski1-0/+4 2021-11-02clk: uniphier: Add SoC-glue clock source selector support for Pro4Kunihiko Hayashi3-0/+23 2021-11-02dt-bindings: clock: uniphier: Add clock binding for SoC-glueKunihiko Hayashi1-0/+3 2021-11-02clk: uniphier: Add NX1 clock supportKunihiko Hayashi3-0/+45 2021-11-02dt-bindings: clock: uniphier: Add NX1 clock bindingKunihiko Hayashi1-0/+3 2021-11-02clk: uniphier: Add audio system and video input clock control for PXs3Kunihiko Hayashi1-0/+2 2021-11-02clk: si5351: Update datasheet referencesJens Renner3-6/+6 2021-11-02clk: vc5: Use i2c .probe_newLuca Ceresoli1-2/+2 2021-11-02clk/actions/owl-factor.c: remove superfluous headersMianhan Liu1-1/+0 2021-11-02clk: ingenic: Fix bugs with divided dividersPaul Cercueil1-3/+3 2021-10-26clk: use clk_core_get_rate_recalc() in clk_rate_get()Claudiu Beznea1-1/+4 2021-10-26clk: at91: sama7g5: set low limit for mck0 at 32KHzClaudiu Beznea1-1/+1 2021-10-26clk: at91: sama7g5: remove prescaler part of master clockClaudiu Beznea1-10/+1 2021-10-26clk: at91: clk-master: add notifier for dividerClaudiu Beznea13-82/+186 2021-10-26clk: at91: clk-sam9x60-pll: add notifier for div part of PLLClaudiu Beznea4-29/+95 2021-10-26clk: at91: clk-master: fix prescaler logicClaudiu Beznea1-1/+1 2021-10-26clk: at91: clk-master: mask mckr against layout->maskClaudiu Beznea1-2/+5 2021-10-26clk: at91: clk-master: check if div or pres is zeroClaudiu Beznea1-2/+2 2021-10-26clk: at91: sam9x60-pll: use DIV_ROUND_CLOSEST_ULLClaudiu Beznea1-2/+2 2021-10-26clk: at91: pmc: add sama7g5 to the list of available pmcsClaudiu Beznea1-2/+3 2021-10-26clk: at91: clk-master: improve readability by using local variablesClaudiu Beznea1-3/+3 2021-10-26clk: at91: clk-master: add register definition for sama7g5's master clockClaudiu Beznea1-27/+23 2021-10-26clk: at91: sama7g5: add securam's peripheral clockClaudiu Beznea1-0/+1 2021-10-26clk: at91: pmc: execute suspend/resume only for backup modeClaudiu Beznea1-0/+39 2021-10-26clk: at91: re-factor clocks suspend/resumeClaudiu Beznea12-181/+558 2021-10-26clk: ux500: Add driver for the reset portions of PRCCLinus Walleij6-13/+244 2021-10-26dt-bindings: clock: u8500: Rewrite in YAML and extendLinus Walleij3-64/+172 2021-10-18clk: composite: Use rate_ops.determine_rate when also a mux is availableMartin Blumenstingl1-20/+48 2021-10-18clk: composite: Also consider .determine_rate for rate + mux compositesMartin Blumenstingl1-5/+5 2021-10-18clk: samsung: describe drivers in KconfigKrzysztof Kozlowski1-10/+20 2021-10-15clk: samsung: exynos5433: update apollo and atlas clock probingWill McVicker1-72/+48 2021-10-15clk: samsung: add support for CPU clocksWill McVicker3-0/+46 2021-10-15clk: samsung: Introduce Exynos850 clock driverSam Protsenko2-0/+836