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path: root/drivers/gpu/drm/amd/amdgpu
AgeCommit message (Expand)AuthorLines
2025-10-20drm/amdgpu: Add ras module ip block to amdgpu discoveryYiPeng Chai-1/+21
2025-10-20drm/amdgpu: check save count before RAS bad page savingTao Zhou-1/+1
2025-10-20drm/amdgpu: add the kernel docs for alloc/free/valid rangeSunil Khatri-0/+33
2025-10-20drm/amdgpu: use GPU_HDP_FLUSH for sriovVictor Zhao-3/+95
2025-10-20drm/amdgpu: Add kiq hdp flush callbacksVictor Zhao-2/+8
2025-10-20drm/amd: Add a helper to tell whether an IP block HW is enabledMario Limonciello-1/+24
2025-10-20drm/amdgpu: Fix vram_usage underflowAlysa Liu-3/+1
2025-10-20drm/amdgpu: Use memset32 for IB paddingTvrtko Ursulin-2/+10
2025-10-20drm/amdgpu: Add ras module eeprom safety watermark checkYiPeng Chai-0/+4
2025-10-20drm/amdgpu: Avoid hive seqno increment in legacy rasYiPeng Chai-0/+3
2025-10-20drm/amdgpu: Avoid loading bad pages into legacy rasYiPeng Chai-0/+3
2025-10-20drm/amdgpu: add ras module rma checkYiPeng Chai-0/+3
2025-10-20drm/amdgpu: Improve ras fatal error handling functionYiPeng Chai-9/+9
2025-10-20drm/amdgpu: Intercept ras interrupts to ras moduleYiPeng Chai-0/+31
2025-10-18drm/client: Remove holds_console_lock parameter from suspend/resumeThomas Zimmermann-4/+4
2025-10-13drm/amdgpu: update remove after reset flag for MES remove queueJonathan Kim-0/+9
2025-10-13drm/amdgpu: Add ras module files into amdgpuYiPeng Chai-1/+8
2025-10-13drm/amdgpu/userqueue: validate userptrs for userqueuesSunil Khatri-0/+79
2025-10-13drm/amdgpu: update the functions to use amdgpu version of hmmSunil Khatri-34/+49
2025-10-13drm/amdgpu: Reserve discovery TMR only if neededLijo Lazar-14/+19
2025-10-13drm/amdgpu: Move reset-on-init sequence earlierLijo Lazar-3/+2
2025-10-13drm/amdgpu: Add amdgpu_discovery_infoLijo Lazar-97/+129
2025-10-13drm/amdgpu: Reorganize sysfs ini/fini callsLijo Lazar-37/+51
2025-10-13drm/amdgpu: clean up and unify hw fence handlingAlex Deucher-167/+63
2025-10-13drm/amdgpu/userq: drop VCN and VPE doorbell handlingAlex Deucher-11/+0
2025-10-13drm/amd: Pass userq suspend failures up to callerMario Limonciello-1/+3
2025-10-13drm/amd: Fix error handling with multiple userq IDRsMario Limonciello-14/+11
2025-10-13drm/amd: Pass IP suspend errors up to callersMario Limonciello-3/+8
2025-10-13drm/amd: Don't always set IP block HW status to falseMario Limonciello-1/+0
2025-10-13drm/amd: Remove comment about handling errors in amdgpu_device_ip_suspend_pha...Mario Limonciello-1/+0
2025-10-13drm/amd: Stop exporting amdgpu_device_ip_suspend() outside amdgpu_deviceMario Limonciello-2/+1
2025-10-13drm/amd: Unify shutdown() callback behaviorMario Limonciello-1/+2
2025-10-13drm/amdgpu: validate userq va for GEM unmapPrike Liang-0/+46
2025-10-13drm/amdgpu: validate the queue va for resuming the queuePrike Liang-0/+44
2025-10-13drm/amdgpu: keeping waiting userq fence infinitelyPrike Liang-4/+9
2025-10-13drm/amdgpu: track the userq bo va for its obj managementPrike Liang-0/+36
2025-10-13drm/amdgpu: add userq object va track helpersPrike Liang-21/+52
2025-10-13drm/amdgpu: reduce queue timeout to 2 seconds v2Christian König-58/+47
2025-10-13drm/amdgpu/mes: adjust the VMID masksAlex Deucher-2/+2
2025-10-13drm/amdgpu: Skip SDMA suspend during mode-2 resetLijo Lazar-0/+4
2025-10-13drm/amdgpu: remove gart_window_lock usage from gmc v12Pierre-Eric Pelloux-Prayer-2/+0
2025-10-13drm/amdgpu: make non-NULL out fence mandatoryPierre-Eric Pelloux-Prayer-15/+8
2025-10-13drm/amdgpu: Remove redundant return valueLijo Lazar-12/+6
2025-10-13drm/amdgpu/userq: extend userq statePrike Liang-0/+1
2025-10-13drm/amdgpu: enable suspend/resume all for gfx 12Jonathan Kim-7/+4
2025-10-13drm/amdgpu: fix hung reset queue array memory allocationJonathan Kim-10/+20
2025-10-13drm/amdgpu: fix initialization of doorbell array for detect and hangJonathan Kim-1/+1
2025-10-13drm/amdgpu: clean up amdgpu hmm range functionsSunil Khatri-71/+50
2025-10-13drm/amdgpu: use user provided hmm_range buffer in amdgpu_ttm_tt_get_user_pagesSunil Khatri-24/+33
2025-10-13drm/amdgpu: fix gfx12 mes packet status return checkJonathan Kim-1/+6
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